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SmartHSF Mobile Modem
Data Sheet
Host-Processed, V.90/K56flex Modem Device Set with CX11250 Host Side Device, CX20463 SmartDAA, and Optional CX20437 Voice Codec for PCI Bus/Mini PCIBased Mobile Applications
Conexant Proprietary Information
Doc. No. 100553B July 28, 2000
SmartHSF Mobile Modem Data Sheet
Revision History
Revision B A Date 7/28/2000 4/19/2000 Comments Revision B release. Initial release.
(c) 2000, Conexant Systems, Inc. All Rights Reserved.
Information in this document is provided in connection with Conexant Systems, Inc. ("Conexant") products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials. Conexant may make changes to specifications and product descriptions at any time, without notice. Conexant makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Conexant's Terms and Conditions of Sale for such products, Conexant assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF CONEXANT PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. CONEXANT FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. CONEXANT SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Conexant products are not intended for use in medical, lifesaving or life sustaining applications. Conexant customers using or selling Conexant products for use in such applications do so at their own risk and agree to fully indemnify Conexant for any damages resulting from such improper use or sale. The following are trademarks of Conexant Systems, Inc.: ConexantTM, the Conexant C symbol, "What's Next in Communications Technologies"TM, K56flexTM, SmartDAATM, and SmartHSF. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. For additional disclaimer information, please consult Conexant's Legal Information posted at www.conexant.com, which is incorporated by reference. Reader Response: Conexant strives to produce quality documentation and welcomes your feedback. Please send comments and suggestions to tech.pubs@conexant.com. For technical questions, contact your local Conexant sales office or field applications engineer.
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Contents
REVISION HISTORY .....................................................................................................................................................II 1. INTRODUCTION................................................................................................................................................. 1-1 1.1 1.2 OVERVIEW .............................................................................................................................................. 1-1 FEATURES .............................................................................................................................................. 1-4 1.2.1 General Modem Features .......................................................................................................... 1-4 1.2.2 PCI Bus Host Interface Features ............................................................................................... 1-5 1.2.3 SmartDAA Features ................................................................................................................... 1-5 1.2.4 Applications................................................................................................................................ 1-5 TECHNICAL OVERVIEW ......................................................................................................................... 1-5 1.3.1 General Description ................................................................................................................... 1-5 1.3.2 Host Modem Software................................................................................................................ 1-5 1.3.3 Operating Modes........................................................................................................................ 1-6 Data/Fax Modes ................................................................................................................ 1-6 Synchronous Access Mode - Video Conferencing............................................................ 1-6 TAM Mode......................................................................................................................... 1-6 Voice/Speakerphone Mode (S Models)............................................................................. 1-6 Personal Digital Cellular High Speed Mode (C Models).................................................... 1-6 PDC Packet Mode (C Models) .......................................................................................... 1-7 PHS Mode (C Models) ...................................................................................................... 1-7 cdmaOne Data Mode IS95A (C Models)........................................................................... 1-7 cdmaOne Data Packet Mode IS95B (C Models)............................................................... 1-7 GSM Mode (C Models)...................................................................................................... 1-7 1.3.4 Reference Design ...................................................................................................................... 1-7 HARDWARE DESCRIPTION ................................................................................................................... 1-7 1.4.1 CX11250 Host Side Device........................................................................................................ 1-7 1.4.2 Digital Isolation Barrier............................................................................................................... 1-8 1.4.3 CX20463 SmartDAA Line Side Device ...................................................................................... 1-8 1.4.4 CX20437 Voice Codec (S Models) ............................................................................................ 1-8 ESTABLISHING DATA MODEM CONNECTIONS ................................................................................... 2-1 Dialing ............................................................................................................................... 2-1 Modem Handshaking Protocol .......................................................................................... 2-1 Call Progress Tone Detection ........................................................................................... 2-1 Answer Tone Detection..................................................................................................... 2-1 Ring Detection................................................................................................................... 2-1 Billing Protection ............................................................................................................... 2-1 Connection Speeds........................................................................................................... 2-1 Automode.......................................................................................................................... 2-1 DATA MODE ............................................................................................................................................ 2-1 Speed Buffering (Normal Mode) ....................................................................................... 2-1 DTE-to-Modem Flow Control............................................................................................. 2-1 Escape Sequence Detection............................................................................................. 2-1 GSTN Cleardown (V.90/K56flex, V.34, V.32 bis, V.32)..................................................... 2-2 Fall Forward/Fallback (V.90/K56flex, V.34/V.32 bis/V.32) ................................................ 2-2 Retrain............................................................................................................................... 2-2 ERROR CORRECTION AND DATA COMPRESSION ............................................................................. 2-2 V.42 Error Correction ........................................................................................................ 2-2 MNP 2-4 Error Correction.................................................................................................. 2-2 V.42 bis Data Compression .............................................................................................. 2-2 MNP 5 Data Compression ................................................................................................ 2-2 FAX CLASS 1 OPERATION..................................................................................................................... 2-2
1.3
1.4
2.
TECHNICAL SPECIFICATIONS......................................................................................................................... 2-1 2.1
2.2
2.3
2.4
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2.5 VOICE/TAM MODE .................................................................................................................................. 2-2 2.5.1 Online Voice Command Mode ................................................................................................... 2-2 2.5.2 Voice Receive Mode .................................................................................................................. 2-3 2.5.3 Voice Transmit Mode ................................................................................................................. 2-3 2.5.4 Speakerphone Modes ................................................................................................................ 2-3 FULL-DUPLEX SPEAKERPHONE (FDSP) MODE .................................................................................. 2-3 CALLER ID............................................................................................................................................... 2-3 MULTIPLE COUNTRY SUPPORT (W MODELS) .................................................................................... 2-3 2.8.1 OEM Programmable Parameters............................................................................................... 2-3 2.8.2 Blacklist Parameters .................................................................................................................. 2-4 DIAGNOSTICS......................................................................................................................................... 2-4 2.9.1 Commanded Tests..................................................................................................................... 2-4 LOW POWER SLEEP MODE .................................................................................................................. 2-4 CX11250 HSD HARDWARE PINS AND SIGNALS.................................................................................. 3-1 3.1.1 HSD Signal Interfaces................................................................................................................ 3-1 PCI Bus/Mini PCI Host Interface ....................................................................................... 3-1 Power Detection and Switching ........................................................................................ 3-1 Serial EEPROM Interface.................................................................................................. 3-1 LSD Interface (Through DIB) ............................................................................................ 3-2 VC Interface (S Models).................................................................................................... 3-2 Telephone Handset Interface (S Models) ......................................................................... 3-2 Call Progress Speaker Interface ....................................................................................... 3-2 PDC/PDC packet Interface ............................................................................................... 3-2 PHS Interface.................................................................................................................... 3-2 CDMA Interface................................................................................................................. 3-3 GSM Interface ................................................................................................................... 3-3 3.1.2 HSD Interface Signals, Pin Assignments, and Signal Definitions .............................................. 3-3 CX20463 SMARTDAA LSD HARDWARE PINS AND SIGNALS.............................................................. 3-16 3.2.1 LSD Signal Interfaces .............................................................................................................. 3-16 HSD Interface (Through DIB) .......................................................................................... 3-16 Telephone Line Interface ................................................................................................ 3-16 3.2.2 LSD Interface Signals, Pin Assignments, and Signal Definitions............................................. 3-16 CX20437 VC HARDWARE PINS AND SIGNALS (S MODELS) ............................................................ 3-21 3.3.1 VC Signal Interfaces ................................................................................................................ 3-21 Speakerphone Interface.................................................................................................. 3-21 Telephone Handset/Headset Interface ........................................................................... 3-21 HSD Interface.................................................................................................................. 3-21 3.3.2 VC Interface Signals, Pin Assignments, and Signal Definitions............................................... 3-21 ELECTRICAL ENVIRONMENTAL, AND TIMING SPECIFICATIONS .................................................... 3-27 3.4.1 Operating Conditions, Absolute Maximum Ratings, and Power Requirements ....................... 3-27 Caution: Handling CMOS Devices .................................................................................. 3-27 3.4.2 SERIAL EEPROM INTERFACE TIMING ................................................................................. 3-29 PCI CONFIGURATION REGISTERS ....................................................................................................... 4-1 4.1.1 0x00 - Vendor ID Field ............................................................................................................... 4-2 4.1.2 0x02 - Device ID Field................................................................................................................ 4-2 4.1.3 0x04 - Command Register ......................................................................................................... 4-2 4.1.4 0x06 - Status Register................................................................................................................ 4-3 4.1.5 0x08 - Revision ID Field ............................................................................................................. 4-3 4.1.6 0x09 - Class Code Field............................................................................................................. 4-3 4.1.7 0x0D - Latency Timer Register .................................................................................................. 4-3 4.1.8 0x0E - Header Type Field .......................................................................................................... 4-3 4.1.9 0x28 - CIS Pointer Register ....................................................................................................... 4-3 4.1.10 0x2C - Subsystem Vendor ID Register ...................................................................................... 4-3 4.1.11 0x2E- Subsystem ID Register .................................................................................................... 4-4 4.1.12 0x34 - Cap Ptr ............................................................................................................................ 4-4 4.1.13 0x3C - Interrupt Line Register .................................................................................................... 4-4
2.6 2.7 2.8
2.9 2.10 3. 3.1
HARDWARE INTERFACE.................................................................................................................................. 3-1
3.2
3.3
3.4
4.
HOST SOFTWARE INTERFACE ....................................................................................................................... 4-1 4.1
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4.1.14 0x3D - Interrupt Pin Register...................................................................................................... 4-4 4.1.15 0x3E - Min Grant Register.......................................................................................................... 4-4 4.1.16 0x3F - Max Latency Register ..................................................................................................... 4-4 4.1.17 0x40 - Capability Identifier.......................................................................................................... 4-4 4.1.18 0x41 - Next Item Pointer ............................................................................................................ 4-4 4.1.19 0x42 - PMC - Power Management Capabilities ......................................................................... 4-5 4.1.20 0x44 - PMCSR - Power Management Control/Status Register (Offset = 4) ............................... 4-5 4.1.21 0x46 - PMCSR_BSE - PMCSR PCI to PCI Bridge Support Extensions..................................... 4-6 4.1.22 0x47 - Data................................................................................................................................. 4-6 BASE ADDRESS REGISTER .................................................................................................................. 4-6 SERIAL EEPROM INTERFACE ............................................................................................................... 4-7 4.3.1 Supported EEPROM Sizes ........................................................................................................ 4-7 4.3.2 Definitions .................................................................................................................................. 4-8 Device ID Register ............................................................................................................ 4-8 Vendor ID Register............................................................................................................ 4-8 Subsystem Vendor ID and Subsystem Device Register ................................................... 4-8 Min_Gnt Register .............................................................................................................. 4-8 Max_Lat Register .............................................................................................................. 4-8 PMC [8:6] and PME DRV Type ......................................................................................... 4-9 Class Code Register (Class Code, Sub-class Code, Prog. I/F) ........................................ 4-9 CardBus CIS Pointer (CardBus CIS pointer High, CardBus CIS pointer Low) (Not Used)................................................................................................................................. 4-9 Data Scale PMCSR[14:13] (D0C, D1C, D2C, D3C, D0D, D1D, D2D, D3D) ..................... 4-9 Data Register (D3, D2, D1, D0 power consumed and D3, D2, D1, D0 power dissipated)......................................................................................................................... 4-9 Load CISRAM Count (CIS _SIZE) (Not Used) .................................................................. 4-9
4.2 4.3
5.
PACKAGE DIMENSIONS................................................................................................................................... 5-1
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Figures
Figure 1-2. SmartHSF Modem Major Interfaces....................................................................................................................... 1-3 Figure 3-1. CX11250 HSD Hardware Interface Signals ........................................................................................................... 3-4 Figure 3-2. CX11250 HSD 100-Pin TQFP Pin Signals............................................................................................................. 3-5 Figure 3-3. CX20463 LSD Hardware Interface Signals .......................................................................................................... 3-17 Figure 3-4. CX20463 LSD 32-Pin TQFP Pin Signals ............................................................................................................. 3-17 Figure 3-5. CX20437 VC Hardware Interface Signals ............................................................................................................ 3-22 Figure 3-6. CX20437 VC 32-Pin TQFP Pin Signals ............................................................................................................... 3-22 Figure 3-7. Waveforms - Serial EEPROM Interface ............................................................................................................... 3-29 Figure 5-1. Package Dimensions - 100-Pin TQFP ................................................................................................................... 5-1 Figure 5-2. Package Dimensions - 32-pin TQFP...................................................................................................................... 5-2
Tables
Table 1-1. SmartHSF Modem Models and Functions............................................................................................................... 1-2 Table 3-1. CX11250 HSD 100-Pin TQFP Pin Signals .............................................................................................................. 3-6 Table 3-2. CX11250 HSD Pin Signal Definitions ...................................................................................................................... 3-9 Table 3-3. Cell Phone/Telephone Line Interface Signals ....................................................................................................... 3-15 Table 3-4. CX20463 LSD 32-Pin TQFP Pin Signals............................................................................................................... 3-18 Table 3-5. CX20463 LSD Pin Signal Definitions .................................................................................................................... 3-19 Table 3-6. CX20463 LSD DC Electrical Characteristics ......................................................................................................... 3-20 Table 3-7. CX20437 VC 32-Pin TQFP Pin Signals................................................................................................................. 3-23 Table 3-8. CX20437 VC Pin Signal Definitions ...................................................................................................................... 3-24 Table 3-9. CX20437 VC Digital Electrical Characteristics ...................................................................................................... 3-26 Table 3-10. CX20437 VC Analog Electrical Characteristics................................................................................................... 3-26 Table 3-11. Operating Conditions........................................................................................................................................... 3-27 Table 3-12. Absolute Maximum Ratings................................................................................................................................. 3-27 Table 3-13. Current and Power Requirements ....................................................................................................................... 3-28 Table 3-14. Timing - Serial EEPROM Interface...................................................................................................................... 3-29 Table 4-1. PCI Configuration Registers.................................................................................................................................... 4-1 Table 4-2. Command Register ................................................................................................................................................. 4-2 Table 4-3. Status Register........................................................................................................................................................ 4-3 Table 4-4. Power Management Capabilities (PMC) Register ................................................................................................... 4-5 Table 4-5. Power Management Control/Status Register (PMCSR) .......................................................................................... 4-5 Table 4-6. HSD Address Map................................................................................................................................................... 4-6 Table 4-7. EEPROM Content for 256 Words by 16 Bits per Word ........................................................................................... 4-7 Table 4-8. EEPROM Content for 128 Words by 16 Bits per Word ........................................................................................... 4-7
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1.
1.1
INTRODUCTION
OVERVIEW
The Conexant SmartHSF Host-Processed (SoftK56) V.90/K56flex Modem Device Family with SmartDAA technology supports analog data up to 56 kbps, analog fax to 14.4 kbps, telephone answering machine (TAM), and PCI Bus/Mini PCI host interface operation. In addition, the device set optionally supports cellular phone interface (PDC high speed/PDC packet data, PHS data, CDMA/CDMA Packet data, GSM data) or voice/speakerphone. These modem devices meet the size and power requirements of the mobile environment. Table 1-1 lists the available models. The modem operates with PSTN telephone lines in the U.S./Japan/Canada and, optionally, worldwide. Optional cellular interface supports Japanese PDC (Personal Digital Cellular) and PHS (Personal Handyphone System) phones, GSM (Global System for Mobile Communications) phones, and cdmaOne (IS-95A/IS-95B) phones. Modem and cellular data protocol software is provided. Conexant's SmartDAA technology (patent pending) eliminates the need for a costly line transformer, relays, and optoisolators typically used in discrete DAA (Data Access Arrangement) implementations. The SmartDAA architecture also simplifies product implementation by eliminating the need for country-specific board configurations enabling worldwide homologation of a single modem board design. The SmartDAA system-powered DAA operates reliably without drawing power from the line, unlike line-powered DAAs which operate poorly when line current is insufficient due to long lines or poor line conditions. Enhanced features, such as monitoring of local extension status without going off-hook, are also supported. Incorporating Conexant's proprietary Digital Isolation Barrier (DIB) design (patent pending) and other innovative DAA features, such as Digital PBX line protection and reporting, the SmartDAA architecture simplifies application design, minimizes layout area, and reduces component cost. For over a decade, Conexant has assisted customers with DAA technology and homologation. This expertise and system level approach has been leveraged in this product. The SmartHSF device set, consisting of a CX11250 Host Side Device (HSD) in a 100-pin TQFP and a CX20463 SmartDAA Line Side Device (LSD) in a 32-pin TQFP, supports data/fax/TAM operation with host software-based digital signal processing and cell phone/DAA/telephone line interface functions. The optional CX20437 Voice Codec (VC), in a 32-pin TQFP, supports voice/full-duplex speakerphone (FDSP) operation with interfaces to a microphone, speaker, and telephone handset/headset. Because some cellular interface signals and CX20437 VC interface signals share the same CX11250 HSD pins, speakerphone configuration does not support the cellular interface. The major hardware signal interfaces are identified in Figure 1-1. In V.90/K56flex data mode, the modem can receive data at speeds up to 56 kbps from a digitally connected V.90 or K56flexcompatible central site modem. In this mode, the modem can transmit data at speeds up to V.34 rates. In V.34 data mode, the modem operates at line speeds up to 33.6 kbps. When applicable, error correction (V.42/MNP 2-4) and data compression (V.42 bis/MNP 5) maximize data transfer integrity and boost average data throughput. Non-errorcorrecting mode is also supported. Fax Group 3 send and receive rates are supported up to 14.4 kbps with T.30 protocol. V.80 synchronous access mode supports host-controlled communication protocols, e. g., H.324 video conferencing. Audio recording and playback over the telephone line interface using A-Law, -Law, or linear coding at 8 kHz sample rate supports applications such as remote digital telephone answering machine (TAM). This designer's guide describes the modem hardware capabilities and identifies the supporting commands. Commands and parameters are defined in the Commands Reference Manual (Doc. No. 100498, formerly identified as Doc. No. 1118).
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SmartHSF Mobile Modem Data Sheet
Table 1-1. SmartHSF Modem Models and Functions
Model/Order/Part Numbers Marketing Name Device Set Order No. Host Side Device (HSD) [100-Pin TQFP] Part No. 11250-11 11250-11 11250-11 11250-11 Line Side Device (LSD) [32-Pin TQFP] Part No. 20463-12 20463-12 20463-11 20463-11 Voice Codec (VC) [32-Pin TQFP] Part No. -- 20437-11 -- 20437-11 Host Bus Supported Hardware Functions (See Note 3) DAA Type PDC HS/ V.90/K56flex PDC Packet, Data, PHS, V.17 Fax, TAM CDMA, GSM Y N Y N Y Y Y Y Worldwide Voice/ FDSP
SmartHSF/MC-PCI SmartHSF/MS-PCI SmartHSF/MWC-PCI SmartHSF/MWS-PCI
DS56-L155-111 DS56-L155-121 DS56-L155-131 DS56-L155-141
PCI PCI PCI PCI
US/J/C US/J/C WW WW
-- -- Y Y
-- Y -- Y
NOTES: 1. Model options: C Cellular M Mobile S Voice/full-duplex speakerphone (FDSP) W Worldwide support including U.S./Japan/Canada -PCI PCI Bus/Mini PCI interface 2. Supported functions (Y = Supported; - = Not supported): TAM Telephone answering machine (Voice playback and record through telephone line) FDSP Full-duplex speakerphone and voice playback and record through telephone line, handset, and mic/speaker PDC HS Personal Digital Cellular High Speed data PDC Packet Personal Digital Cellular Packet data PHS Personal Handyphone System CDMA Code Division Multiple Access GSM Global System for Mobile Communications data 3. Software configuration/functions determined by Device ID programmed into EEPROM (see Section 4.3). 4. For ordering purposes, the CX prefix may not be included in the part number for some devices. Also, the CX prefix may not appear in the part number as branded on some devices.
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OEM Supplied Hardware
Conexant Modem Product OEM/Customer Supplied Software Conexant Modem Software Conexant Modem Hardware Devices
CX11250 Host Side Device (HSD) 100-Pin TQFP
Host Computer SmartDAA Interface
DAA Hardware CX20463 SmartDAA Line Side Device (LSD) 32-Pin TQFP Digital Isolation Barrier (DIB) Components
Rectifier and Filter Components
Line Side DIB Interface (LSDI)
Codec
Telephone Line Interface
Telephone Line Interface Discrete Components
TELEPHONE LINE TIP RING
Operating System Software and Modem Communication Application Software
Modem Software Drivers
PCI Bus/ MiniPCI
PCI Bus Interface
Voice Relay, HS Pickup Detector (Optional)
TELEPHONE HANDSET TIP RING
Voice Codec Interface
CX20437 Voice Codec (VC) 32-Pin TQFP (Optional)
HS Hybrid Components (Optional) (Mic/Speaker) SPEAKER Interface (Optional) Digital Speaker Circuit (Optional) PDC/ PDC Packet/ PHS/CDMA/ CDMA Packet/ GSM Interface (Optional) MIC SPEAKER
Call Progress
SOUNDUCER
Cell Phone Interface
PDC/PHS/ CDMA/ GSM PHONE
Note: Speakerphone configuration does not support the cellular interface.
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Figure 1-1. SmartHSF Modem Major Interfaces
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SmartHSF Mobile Modem Data Sheet 1.2 1.2.1 FEATURES General Modem Features
* V.90 data modem with receive rates up to 56k bps and send rates up to V.34 rates - ITU-T V.90, K56flex, V.34 (33.6 kbps), V.32 bis, V.32, V.22 bis, V.22, V.23, and V.21; Bell 212A and 103 - V.42 LAPM and MNP 2-4 error correction - V.42 bis and MNP 5 data compression - V.250 and V.251 commands * V.17 fax modem with send and receive rates up to 14.4 kbps - V.17, V.29, V.27 ter, and V.21 channel 2 - EIA/TIA 578 Class 1 and T.31 Class 1.0 commands * Telephony/TAM - V.253 commands - 8-bit -Law/A-Law coding (G.711) - 8-bit/16-bit linear coding - 8 kHz sample rate - Concurrent DTMF, ring, and Caller ID detection * V.80 synchronous access mode supports host-controlled communication protocols with H.324 interface support * V.8/V.8bis and V.251 commands * Cellular data hardware interface and software support (C models) - Protocol stacks for PDC high speed data, PDC packet data, PHS data, CDMA IS-95A/IS-95B data, and GSM data - API for customer-provided cellular data protocol stack * Full-duplex Speakerphone (FDSP) Mode (S models) - Microphone and speaker interface - Telephone handset/headset interface * Data/Fax/Voice call discrimination * Host software/MMX-based digital signal processing * Single configuration profile stored in host * Operates in U.S./Japan/Canada * Worldwide operation including U.S./Japan/Canada (W models) - Complies to TBR21 and other country requirements - Caller ID detection * System compatibility - Windows 95/98, Windows NT 4.0, Windows 2000, and Windows Millennium (Windows Me) operating systems - Microsoft'/Intel PC 99 Windows Hardware Designer's Guide-compliant - Advanced Configuration and Power Interface (ACPI) - Unimodem/V compliant - Pentium 166 MHz MMX-compatible PC or greater - 16 Mbyte RAM or more * Thin packages support low profile designs - CX11250 HSD: 100-pin TQFP (1.2 mm max. height) - CX20463 LSD: 32-pin TQFP (1.6 mm max. height) - CX20437 VC: 32-pin TQFP (1.6 mm max. height) * +3.3V operation with +5V tolerant digital inputs
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SmartHSF Mobile Modem Data Sheet 1.2.2 PCI Bus Host Interface Features
* 32-bit PCI Bus host interface - Meets PCI Local Bus Specification Rev. 2.2 - PCI Bus Mastering interface - 33 MHz PCI clock support * Supports Power Management - Meets PCI Bus Power Management Spec. Rev. 1.1 - ACPI Power Management Registers - APM support - PME# support - Vaux/Vpci power switching support (-PCI model option) - VauxDET support
1.2.3
* * * * * * * * * * * * *
SmartDAA Features
Digital PBX line protection System side powered DAA operates under poor line current supply conditions Wake-on-ring Ring detection Line polarity reversal detection Line current loss detection Caller ID (CID) detect Pulse dialing Line-in-use detection - detects even while on-hook Remote hang-up detect - for efficient call termination Extension pickup detect Call waiting detection Meets worldwide DC VI Masks requirements (W models)
1.2.4
Applications
* Laptop, notebook, and handheld computers * PCI Bus/Mini PCI embedded system boards * PCI Bus/Mini PCI plug-in cards
1.3 1.3.1
TECHNICAL OVERVIEW General Description
Modem operation, including dialing, call progress, telephone line interface, telephone handset interface, PDC High Speed/GSM interface, voice/speakerphone interface, and host interface functions are supported and controlled through the V.250, V.251, and V.253-compatible command set. The modem hardware connects to the host processor via a PCI/Mini PCI bus interface. The OEM adds a crystal circuit, EEPROM, DIB and LSD power rectifier and filter components, telephone line interface, optional telephone handset interface, optional PDC high speed/GSM interface, optional voice/speakerphone interface, and other supporting discrete components as required by the modem model and the application to complete the system.
1.3.2
1.
Host Modem Software
The host modem software performs the following tasks: General modem control, which includes command sets, fax Class 1, TAM, voice/speakerphone, error correction, data compression, GSM protocol stacks, PDC high speed data protocol stacks and phone drivers, and operating system interface functions. Modem data pump signal processing, which includes data and facsimile modulation and demodulation, as well as voice sample formatting, is performed by the host processor using Conexant SoftK56 technology. SmartDAA control, which includes HSD SmartDAA Interface control, LSD configuration and control, telephone line interface parameter control, and telephone line impedance control.
2. 3.
Configurations of the modem software are provided to support modem models listed in Table 1-1.
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SmartHSF Mobile Modem Data Sheet 1.3.3 Operating Modes
Data/Fax Modes In V.90/K56flex data modem mode, the modem can receive data from a digital source using a V.90- or K56flex-compatible central site modem at line speeds up to 56 kbps. Asymmetrical data transmission supports sending data at line speeds up to V.34 rates. This mode can fallback to full-duplex V.34 mode, and to lower rates, as dictated by line conditions. In V.34 data modem mode, the modem can operate in 2-wire, full-duplex, asynchronous modes at line rates up to 33.6 kbps. Data modem modes perform complete handshake and data rate negotiations. Using V.34 modulation to optimize modem configuration for line conditions, the modem can connect at the highest data rate that the channel can support from 33600 bps down to 2400 bps with automatic fallback. Automode operation in V.34 is provided in accordance with PN3320 and in V.32 bis in accordance with PN2330. All tone and pattern detection functions required by the applicable ITU or Bell standard are supported. In V.32 bis data modem mode, the modem can operate at line speeds up to 14.4 kbps. In fax modem mode, the modem can operate in 2-wire, half-duplex, synchronous modes and can support Group 3 facsimile send and receive speeds of 14400, 12000, 9600, 7200, 4800, and 2400 bps. Fax data transmission and reception performed by the modem are controlled and monitored through the EIA/TIA-578 Class 1 or T.31 Class 1.0 command interface. Full HDLC formatting, zero insertion/deletion, and CRC generation/checking are provided. Synchronous Access Mode - Video Conferencing V.80 Synchronous Access Mode (SAM) between the modem and the host/DTE is provided for host-controlled communication protocols, e.g., H.324 video conferencing applications. Voice-call-first (VCF) before switching to a videophone call is also supported. TAM Mode TAM Mode features include 8-bit -Law, A-Law, and linear coding at 8 kHz sample rate. Full-duplex voice supports concurrent voice receive and transmit. Tone detection/generation, call discrimination, and concurrent DTMF detection are also supported. This mode supports applications such as digital TAM, voice annotation, and recording from and playback to the telephone line. ADPCM (4-bit IMA) coding is also supported to meet Microsoft WHQL logo requirements. TAM Mode is supported by three submodes: 1. 2. 3. Online Voice Command Mode supports connection to the telephone line or, for S models, a microphone/speaker/handset/headset. Voice Receive Mode supports recording voice or audio data input from the telephone line or, for S models, a microphone/handset/headset. Voice Transmit Mode supports playback of voice or audio data to the telephone line or, for S models, a speaker/handset/headset.
Voice/Speakerphone Mode (S Models) The S models include additional telephone handset, external microphone, and external speaker interfaces which support voice and full-duplex speakerphone (FDSP) operation. Hands-free full-duplex telephone operation is supported in Speakerphone Mode under host control. Speakerphone Mode features an advanced proprietary speakerphone algorithm which supports full-duplex voice conversation with acoustic, line, and handset echo cancellation. Parameters are constantly adjusted to maintain stability with automatic fallback from fullduplex to pseudo-duplex operation. The speakerphone algorithm allows position independent placement of microphone and speaker. The host can separately control volume, muting, and AGC in microphone and speaker channels. NOTE: Because some cellular interface signals and CX20437 VC interface signals share the same CX11250 HSD pins, speakerphone configuration does not support the cellular interface. Personal Digital Cellular High Speed Mode (C Models) Personal Digital Cellular (PDC) High Speed Mode, implemented in host software, includes V.42 bis data compression and ARQ framing. A pass-through mode is also available to allow phone book data to be transferred to and from the PC at speeds up to 9600 bps (e.g., for editing on the PC). PDC High Speed Mode is enabled by the +WS46=20 and +CPDCM=2 AT commands and disabled by the +WS46=1 AT command.
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SmartHSF Mobile Modem Data Sheet
PDC Packet Mode (C Models) PDC Packet Mode, implemented in host software as an optional mode of PDC, enables packet-based data communications at 28.8 kbps. PDC Packet Data Mode is enabled by the +WS46=20 and +CPDCM=3 AT commands and disabled by the +WS46=1 AT command. PHS Mode (C Models) PHS Data Mode is implemented in host software and supports a data rate of 32 kbps. PHS uses the PIAFS protocol stack. PHS Data Mode is enabled by the +WS46=26 AT command and disabled by the +WS46=1 AT command. cdmaOne Data Mode IS95A (C Models) cdmaOne Data Mode is implemented in host software and supports data rates of 9.6 kbps and 14.4 kbps. cdmaOne Data Mode is enabled by the +WS46=13 AT command and disabled by the +WS46=1 AT command. cdmaOne Data Packet Mode IS95B (C Models) cdmaOne Data Packet Mode is implemented in host software and supports a data rate of 64 kbps. cdmaOne Data Packet Mode is enabled by the +WS46=13 AT command and disabled by the +WS46=1 AT command. GSM Mode (C Models) GSM Mode, implemented in host software, supports data and fax transfer. The supported features include: * Data modem - V.21, V.23, V.22, V.22 bis, V.32 - ISDN interoperability: 300 bps to 9600 bps * Transparent asynchronous mode up to 9600 bps * Non-transparent mode (RLP) up to 9600 bps * Fax modem send and receive rate up to 9600 bps * AT GSM commands (ETSI 07.07) * GSM direct connect * Driver interface for OEM-provided phone driver * Built-in parallel host (16550A UART) interface GSM mode is enabled by the +WS46=12 AT command and disabled by the +WS46=1 AT command.
1.3.4
Reference Design
A Mini PCI Type IIIB data/fax/TAM reference design board is available to minimize application design time and costs. The board is pretested to pass FCC Part 15, Part 68, and CTR 21 for immediate manufacturing. A design package for the board is available in electronic form. The design package includes schematics, bill of materials (BOM), vendor parts list (VPL), board layout files in Gerber format, and complete documentation. The design can also be used for the basis of a custom design by the OEM to accelerate design completion for rapid market entry.
1.4
HARDWARE DESCRIPTION
SmartDAA technology (patent pending) eliminates the need for a costly analog transformer, relays, and opto-isolators that are typically used in discrete DAA implementations. The programmable SmartDAA architecture simplifies product implementation in worldwide markets by eliminating the need for country-specific components.
1.4.1
CX11250 Host Side Device
The CX11250 Host Side Device (HSD), packaged in a 100-pin TQFP, includes a PCI/Mini PCI Interface and a SmartDAA Interface. The PCI/Mini PCI interface connects directly to an embedded or external PCI/Mini PCI interface eliminating the need for additional external logic components. The SmartDAA Interface communicates with, and supplies power and clock to, the LSD through the DIB.
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SmartHSF Mobile Modem Data Sheet 1.4.2 Digital Isolation Barrier
The OEM-supplied Digital Isolation Barrier (DIB) electrically DC isolates the HSD from the LSD and telephone line. The HSD is connected to a fixed digital ground and operates with standard CMOS logic levels. The LSD is connected to a floating ground and can tolerate high voltage input (compatible with telephone line and typical surge requirements). The DIB transformer couples power and clock from the HSD to the LSD. (See Mobile Product Updates for qualified transformers.) The DIB data channel supports bidirectional half-duplex serial transfer of data, control, and status information between the HSD and the LSD.
1.4.3
CX20463 SmartDAA Line Side Device
The CX20463 SmartDAA Line Side Device (LSD) includes a Line Side DIB Interface (LSDI), a coder/decoder (codec), and a Telephone Line Interface (TLI). The LSDI communicates with, and receives power and clock from, the SmartDAA interface in the HSD through the DIB. LSD power is received from the HSD PWRCLKP and PWRCLKN pins via the DIB through a half-wave rectifying diode and capacitive power filter circuit connected to the DIB transformer secondary winding. The CLK input is also coupled from the transformer secondary winding through a capacitor and a resistor in series. Information is transferred between the LSD and the HSD through the DIB_P and DIB_N pins. These pins connect to the HSD DIB_DATAP and DIB_DATAN pins, respectively, through the DIB. The TLI integrates DAA and direct telephone line interface functions and connects directly to the line TIP and RING pins, as well as to external line protection components. Direct LSD connection to TIP and RING allows real-time measurement of telephone line parameters, such as the telephone central office (CO) battery voltage, individual telephone line (copper wire) resistance, and allows dynamic regulation of the offhook TIP and RING voltage and total current drawn from the central office (CO). This allows the modem to maintain compliance with U.S. and worldwide regulations and to actively control the DAA power dissipation.
1.4.4
CX20437 Voice Codec (S Models)
The optional CX20437 Voice Codec (VC), packaged in a 32-pin TQFP, supports voice/full-duplex speakerphone (FDSP) operation with interfaces to a microphone and speaker and to a telephone handset/headset.
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SmartHSF Mobile Modem Data Sheet
2.
2.1
Dialing
TECHNICAL SPECIFICATIONS
ESTABLISHING DATA MODEM CONNECTIONS
DTMF Dialing. DTMF dialing using DTMF tone pairs is supported in accordance with ITU-T Q.23. The transmit tone level complies with Bell Publication 47001. Pulse Dialing. Pulse dialing is supported in accordance with EIA/TIA-496-A. Blind Dialing. The modem can blind dial in the absence of a dial tone if enabled by the X0, X1, or X3 command. Modem Handshaking Protocol If a tone is not detected within the time specified in the S7 register after the last digit is dialed, the modem aborts the call attempt. Call Progress Tone Detection Ringback, equipment busy, and progress tones can be detected in accordance with the applicable standard represented by the country profile currently in affect. Answer Tone Detection Answer tone can be detected over the frequency range of 2100 40 Hz in ITU-T modes and 2225 40 Hz in Bell modes. Ring Detection A ring signal can be detected from a TTL-compatible square wave input (frequency is country-dependent). Billing Protection When the modem goes off-hook to answer an incoming call, both transmission and reception of data are prevented for a period of time determined by country requirement to allow transmission of the billing signal. Connection Speeds Data modem line speed can be selected using the +MS command in accordance with V.25 ter. The +MS command selects modulation, enables/disables automode, and selects transmit and receive minimum and maximum line speeds. Automode Automode detection can be enabled by the +MS command to allow the modem to connect to a remote modem in accordance with V.25 ter.
2.2
DATA MODE
Data mode exists when a telephone line connection has been established between modems and all handshaking has been completed. Speed Buffering (Normal Mode) Speed buffering allows a DTE to send data to, and receive data from, a modem at a speed different than the line speed. The modem supports speed buffering at all line speeds. DTE-to-Modem Flow Control If the modem-to-line speed is less than the DTE-to-modem speed, the modem supports XOFF/XON or RTS/CTS flow control with the DTE to ensure data integrity. Escape Sequence Detection The "+++" escape sequence can be used to return control to the command mode from the data mode. Escape sequence detection is disabled by an S2 Register value greater than 127.
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SmartHSF Mobile Modem Data Sheet
GSTN Cleardown (V.90/K56flex, V.34, V.32 bis, V.32) Upon receiving GSTN Cleardown from the remote modem in a non-error correcting mode, the modem cleanly terminates the call. Fall Forward/Fallback (V.90/K56flex, V.34/V.32 bis/V.32) During initial handshake, the modem will fallback to the optimal line connection within K56flex/V.34/V.32 bis/V.32 mode depending upon signal quality if automode is enabled by the +MS command. When connected in V.90/K56flex/V.34/V.32 bis/V.32 mode, the modem will fall forward or fallback to the optimal line speed within the current modulation depending upon signal quality if fall forward/fallback is enabled by the %E1 command. Retrain The modem may lose synchronization with the received line signal under poor line conditions. If this occurs, retraining may be initiated to attempt recovery depending on the type of connection. The modem initiates a retrain if line quality becomes unacceptable if enabled by the %E command. The modem continues to retrain until an acceptable connection is achieved, or until 30 seconds elapse resulting in line disconnect.
2.3
ERROR CORRECTION AND DATA COMPRESSION
V.42 Error Correction V.42 supports two methods of error correction: LAPM and, as a fallback, MNP 4. The modem provides a detection and negotiation technique for determining and establishing the best method of error correction between two modems. MNP 2-4 Error Correction MNP 2-4 is a data link protocol that uses error correction algorithms to ensure data integrity. Supporting stream mode, the modem sends data frames in varying lengths depending on the amount of time between characters coming from the DTE. V.42 bis Data Compression V.42 bis data compression mode operates when a LAPM or MNP connection is established. The V.42 bis data compression employs a "string learning" algorithm in which a string of characters from the DTE is encoded as a fixed length codeword. Two dictionaries, dynamically updated during normal operation, are used to store the strings. MNP 5 Data Compression MNP 5 data compression mode operates during an MNP connection. In MNP 5, the modem increases its throughput by compressing data into tokens before transmitting it to the remote modem, and by decompressing encoded received data before sending it to the DTE.
2.4
FAX CLASS 1 OPERATION
Facsimile functions operate in response to Fax Class 1 commands when +FCLASS=1 or +FCLASS=1.0. In the fax mode, the on-line behavior of the modem is different from the data (non-fax) mode. After dialing, modem operation is controlled by fax commands. Some AT commands are still valid but may operate differently than in data modem mode. Calling tone is generated in accordance with T.30.
2.5
VOICE/TAM MODE
Voice and audio functions are supported by the Voice Mode. Voice Mode includes three submodes: Online Voice Command Mode, Voice Receive Mode, and Voice Transmit Mode.
2.5.1
Online Voice Command Mode
This mode results from the connection to the telephone line or a voice/audio I/O device (e.g., microphone or speaker) through the use of the +FCLASS=8 and +VLS commands. After mode entry, AT commands can be entered without aborting the connection.
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SmartHSF Mobile Modem Data Sheet 2.5.2 Voice Receive Mode
This mode is entered when the +VRX command is active in order to record voice or audio data input, typically from a microphone or the telephone line. Received analog voice samples are converted to digital form and compressed for reading by the host. AT commands control the codec sample rate. Received analog mono audio samples are converted to digital form and formatted into 8-bit -Law, A Law, linear, or 4-bit IMA ADPCM format for reading by the host. AT commands control the bit length and sampling rate. Concurrent DTMF/tone detection is available.
2.5.3
Voice Transmit Mode
This mode is entered when the +VTX command is active in order to playback voice or audio data, typically to a speaker or to the telephone line. Concurrent DTMF/tone detection is available. Digitized audio data is converted to analog form.
2.5.4
Speakerphone Modes
Speakerphone modes are selected in voice mode with the following commands: Speakerphone ON/OFF (+VSP). This command turns the Speakerphone function ON (+VSP = 1) or OFF (+VSP = 0). Microphone Gain (+VGM=). This command sets the microphone gain of the Speakerphone function. Speaker Gain (+VGS=). This command sets the speaker gain of the Speakerphone function.
2.6
FULL-DUPLEX SPEAKERPHONE (FDSP) MODE
The modem operates in FDSP mode when +FCLASS=8 and +VSP=1 (see 2.5.4). In FDSP Mode, speech from a microphone or handset is converted to digital form, shaped, and output to the telephone line through the line interface circuit. Speech received from the telephone line is shaped, converted to analog form, and output to the speaker or handset. Shaping includes both acoustic and line echo cancellation.
2.7
CALLER ID
Caller ID can be enabled/disabled using the +VCID command. When enabled, caller ID information (date, time, caller code, and name) can be passed to the DTE in formatted or unformatted form. Inquiry support allows the current caller ID mode and mode capabilities of the modem to be retrieved from the modem. The retrieval of the Caller ID via an explicit AT query at a later time is essential for implementing a compliant "Instantly available PC" concept.
2.8
MULTIPLE COUNTRY SUPPORT (W MODELS)
W models support modem operation in various countries. The country choice is made via the AT+GCI command or country select applet from within those installed in Windows registry. The following capabilities are provided in addition to the data modem functions previously described. Country dependent parameters are included in the .INF file for customization by the OEM Programmable Parameters
2.8.1
OEM Programmable Parameters
The following parameters are programmable: * Dial tone detection levels and frequency ranges * DTMF dialing transmit output level, DTMF signal duration, and DTMF interdigit interval parameters * Pulse dialing parameters such as make/break times, set/clear times, and dial codes * Ring detection frequency range * Blind dialing disable/enable * The maximum, minimum, and default carrier transmit level values * Calling tone, generated in accordance with V.25, may also be disabled * Call progress frequency and tone cadence for busy, ringback, congested, dial tone 1, and dial tone 2 * Answer tone detection period * On-hook/off-hook, make/break, and set/clear relay control parameters
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SmartHSF Mobile Modem Data Sheet 2.8.2 Blacklist Parameters
The modem can operate in accordance with requirements of individual countries to prevent misuse of the network by limiting repeated calls to the same number when previous call attempts have failed. Call failure can be detected for reasons such as no dial tone, number busy, no answer, no ringback detected, voice (rather than modem) detected, and key abort (dial attempt aborted by user). Actions resulting from such failures can include specification of minimum inter-call delay, extended delay between calls, and maximum numbers of retries before the number is permanently forbidden ("blacklisted"). Up to 20 such numbers may be tabulated. The blacklist parameters are programmable. The current blacklisted and delayed numbers can be queried via AT*B and AT*D commands, respectively.
2.9 2.9.1
DIAGNOSTICS Commanded Tests
Diagnostics are performed in response to the &T1 command per V.54. Analog Loopback (&T1 Command). Data from the local DTE is sent to the modem, which loops the data back to the local DTE. Last Call Status Report (#UD). This command reports the status of the last call.
2.10
LOW POWER SLEEP MODE
When not connected in data, fax, or speakerphone mode, the HSD is placed in a low power state, i.e., Idle Mode.
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SmartHSF Mobile Modem Data Sheet
3.
3.1 3.1.1
HARDWARE INTERFACE
CX11250 HSD HARDWARE PINS AND SIGNALS HSD Signal Interfaces
PCI Bus/Mini PCI Host Interface The Host Side Device conforms to the PCI Local Bus Specification Version 2.2 and Mini PCI Specification Draft 1.0. It is a memory slave and a bus master for PC host memory accesses (burst transactions). Configuration is by PCI configuration protocol. The PCI Bus/Mini PCI interface signals are: * Address and data - 32 bidirectional Address/Data (AD[31-0]); bidirectional - 4 Bus Command and Byte Enable (CBE [3:0]); bidirectional - Bidirectional Parity (PAR); bidirectional * Interface control - Cycle Frame (FRAME#); bidirectional - Initiator Ready (IRDY#); bidirectional - Target Ready (TRDY#); bidirectional - Stop (STOP#); bidirectional - Initialization Device Select (IDSEL); input - Device Select (DEVSEL#); bidirectional * Arbitration - Request (REQ#); output - Grant (GRANT#); input * Error reporting - Parity Error (PERR#); bidirectional - System Error (SERR#); bidirectional * Interrupt - Interrupt A (INTA#); output * System - Clock (PCICLK); input - Reset (PCIRST#); input - Clock Running (CLKRUN#); input - Power Management Event (PME#), output Power Detection and Switching * Vaux Enable (VauxEN#); output * Vpci Enable (VpciEN#); output * Vpci Detect (VpciDET); input * Vaux Detect (VauxDET); input Serial EEPROM Interface A serial EEPROM is required to store the Device ID, Vendor ID, Subsystem ID, Subsystem Vendor ID, and Power Management parameters for the PCI Configuration Space Header. The EEPROM must be 2048 (128 x 16) bits or larger and be rated at 1MHz (SROMCLK is 537.6 kHz). For example, the following EEPROMs or equivalent may be used: Microchip 93LC66B (256 x 16), 93LC56B (128 x 16), Atmel AT93C66 (256 x 16), AT93C56 (128 x 16). The EEPROM is programmable by the PC via the modem. The EEPROM interface signals are: * Serial Data Input (SROMIN); input * Serial Data Output (SROMOUT); output * Clock (SROMCLK); output * Chip Select (SROMCS); output
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SmartHSF Mobile Modem Data Sheet
LSD Interface (Through DIB) The DIB interface signals are: * Clock and Power Positive (PWRCLKP); output * Clock and Power Negative (PWRCLKN); output * Data Positive (DIB_DATAP); input/output * Data Negative (DIB_DATAN); input/output VC Interface (S Models) The VC interface signals are: * Modem Sleep (IASLEEP); output * Master Clock (M_CLK); output * Voice Serial Clock (V_SCLK); input * Voice Serial Control (V_CTRL); output * Voice Serial Frame Sync (V_STROBE); input * Voice Serial Transmit Data (V_TXSIN); output * Voice Serial Receive Data (V_RXOUT); input Telephone Handset Interface (S Models) The telephone handset interface signals are: * Voice Relay Control (VOICE#); output * Handset Pickup Detect (H_PICKUP); input Call Progress Speaker Interface The call progress speaker interface signal is: * Digital speaker output (DSPKOUT); output DSPKOUT is a square wave output in Data/Fax mode used for call progress or carrier monitoring. This output can be optionally connected to a low-cost on-board speaker, e.g., a sounducer, or to an analog speaker circuit. PDC/PDC packet Interface Nine lines, defined by the installed cell phone driver software, are available to support the PDC/PDC packet cellular phone interface: * Panel 1 * Panel 2 * ADP * CELL_RXD * CELL_TXD * TCH_CLK * TCH_TX * TCH_RX * TCH_FRAME PHS Interface Eleven lines, defined by the installed cell phone driver software, are available to support the PHS cellular phone interface. * ASLP * PSLP * DFCK * Ready * DSDT * USDT * BITC * UDT * DDT * UFCK
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SmartHSF Mobile Modem Data Sheet
CDMA Interface Twelve lines, defined by the installed cell phone driver software, are available to support the CDMA cellular phone interface: * Panel 1 * Panel 2 * CB * CF * CJ * CC * CE * CD * Control RXD * Control TXD * BB (USART IN) * BA (USART OUT) GSM Interface Five lines, defined by the installed cell phone driver software, are available to support the GSM phone interface: * DA(IN) * RX-A * TX-A * TX-A * RX2-B USART * TX2-B USART
3.1.2
HSD Interface Signals, Pin Assignments, and Signal Definitions
The CX11250 HSD 100-pin TQFP hardware interface signals are shown by major interface in Figure 3-1, are shown by pin number in Figure 3-2, and are listed by pin number in Table 3-1. The CX11250 HSD hardware interface signals are defined in Table 3-2. Cell phone/telephone line interface signal assignments are listed in Table 3-3.
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SmartHSF Mobile Modem Data Sheet
27pF 5% 28.224 MHz 27pF 5% CLKRUN# AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 C/BE0# C/BE1# C/BE2# C/BE3# PCICLK FRAME# IDSEL DEVSEL# IRDY# TRDY# PAR REQ# GNT# INTA# STOP# PERR# SERR# PME# PCIRST# VIO/+3.3V
74 1M 33 75
SDXTAL1
SDXTAL2
CX11250 HOST SIDE DEVICE (HSD) 100-PIN TQFP
PWRCLKP PWRCLKN DIB_DATAP DIB_DATAN
92 93 91 90
PWRCLKP PWRCLKN DIB_DATAP DIB_DATAN DIGITAL ISOLATION BARRIER (DIB)
PCI BUS/ MINI PCI
86 67 66 65 64 62 61 60 59 56 55 54 53 52 51 50 49 37 35 34 33 32 30 29 28 24 23 21 20 19 17 16 15 57 48 38 25 10 39 27 42 40 41 46 13 12 8 43 44 45 14 9 22 26 76 79 78 77 71 80 69 79 97
CLKRUN# AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31 CBE0# CBE1# CBE2# CBE3# PCICLK FRAME# IDSEL DEVSEL# IRDY# TRDY# PAR REQ# GNT# INTA# STOP# PERR# SERR# PME# PCIRST# VIO VIO SROMCS SROMCLK SROMIN SROMOUT VpciDET VauxDET VpciEN# VauxEN# PLLVDD
DRESET# (GPOL0) M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL2 (GPIO13) V_SCLK/CB (GPIO7) V_RXOUT/ASLP/CF (GPIO1) V_TXSIN/PSLP/CJ (GPIO9) V_STROBE/CC/DA(IN) (GPIO0) IASLEEP/DFCK/CE/RXA Binary Audio In (GPIO10) VOICE#/ADP/RDY/CD(GPIO2) SPKMUTE/CRXD/DSDT (GPIO8) DSPKOUT/CTXD/USDT//TXA (GPIO11) TCH_CLK/BITC (GPIO6) TCH_TX/UDT/TXA (GPIO5) TCH_RX/DDT/ BB/RX2B (GPIO4) TCH_FRAME/UFCK/BA/TX2B (GPIO3)
95 5 6 3 2 4 1 96 88 100 99 87 81 82 83 85
POR M_CLKIN M_CNTRLSIN M_SCK M_RXOUT M_TXSIN M_STROBE SLEEP Binary Audio Source VOICE RELAY MUTE SPEAKER CALL PROG DIGITAL AUDIO NC NC NC NC
TELEPHONE LINE INTERFACE CONFIGURATION
VOICE CODEC (VC) 20437 32-PIN TQFP
SPEAKER CIRCUIT
DRESET# (GPOL0) M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL2 (GPIO13) V_SCLK/CB (GPIO7) V_RXOUT/ASLP/CF (GPIO1) V_TXSIN/PSLP/CJ (GPIO9) V_STROBE/CC/DA(IN) (GPIO0) IASLEEP/DFCK/CE/RXA Binary Audio In (GPIO10) VOICE#/ADP/RDY/CD(GPIO2) SPKMUTE/CRXD/DSDT (GPIO8) DSPKOUT/CTXD/USDT//TXA (GPIO11) TCH_CLK/BITC (GPIO6) TCH_TX/UDT/TXA (GPIO5) TTCH_RX/DDT/ BB/RX2B (GPIO4) TCH_FRAME/UFCK/BA/TX2B (GPIO3)
95 5 6 3 2 4 1 96 88 100 99 87 81 82 83 85
NC Panel 1 Panel 2 NC NC NC NC NC NC ADP CELL_RXD CELL_TXD TCH_CLK TCH_TX TCH_RX TCH_FRAME
PDC/PDC PACKET INTERFACE CONFIGURATION
PDC PHONE
DRESET# (GPOL0) M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL2 (GPIO13) V_SCLK/CB (GPIO7) V_RXOUT/ASLP/CF (GPIO1) V_TXSIN/PSLP/CJ (GPIO9) V_STROBE/CC/DA(IN) (GPIO0) IASLEEP/DFCK/CE/RXA Binary Audio In (GPIO10) VOICE#/ADP/RDY/CD(GPIO2) SPKMUTE/CRXD/DSDT (GPIO8) DSPKOUT/CTXD/USDT//TXA (GPIO11) TCH_CLK/BITC (GPIO6) TCH_TX/UDT/TXA (GPIO5) TCH_RX/DDT/ BB/RX2B (GPIO4) TCH_FRAME/UFCK/BA/TX2B (GPIO3)
95 5 6 3 2 4 1 96 88 100 99 87 81 82 83 85
NC NC NC NC ASLP PSLP NC DFCK NC RDY DSDT USDT BITC UDT DDT UFCK
PHS INTERFACE CONFIGURATION
PHS PHONE
EEPROM
SROMCS SROMCLK SROMIN SROMOUT VpciDET VauxDET VpciEN# VauxEN#
POWER DETECTION AND SWITCHING CIRCUIT
+3.3V
0.1uF
98
PLLVSS
DRESET# (GPOL0) M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL2 (GPIO13) V_SCLK/CB (GPIO7) V_RXOUT/ASLP/CF (GPIO1) V_TXSIN/PSLP/CJ (GPIO9) V_STROBE/CC/DA(IN) (GPIO0) IASLEEP/DFCK/CE/RXA Binary Audio In (GPIO10) VOICE#/ADP/RDY/CD(GPIO2) SPKMUTE/CRXD/DSDT (GPIO8) DSPKOUT/CTXD/USDT//TXA (GPIO11) TCH_CLK/BITC (GPIO6) TCH_TX/UDT/TXA (GPIO5) TCH_RX/DDT/ BB/RX2B (GPIO4) TCH_FRAME/UFCK/BA/TX2B (GPIO3)
95 5 6 3 2 4 1 96 88 100 99 87 81 82 83 85
NC Panel 1 Panel 2 CB CF CJ CC CE NC CD Control RXD Control TXD NC NC BB (USART IN) BA (USART OUT)
CDMA/CDMA PACKET INTERFACE CONFIGURATION
CDMA PHONE
+3.3V 240K +3.3V
84
LP_CLK
7 18 31 47 58 68 94
VDD VDD VDD VDD VDD VDD VDD
11 36 63 89 72 73
GND GND GND GND SCANEN SCANMODE
DRESET# (GPOL0) M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL2 (GPIO13) V_SCLK/CB (GPIO7) V_RXOUT/ASLP/CF (GPIO1) V_TXSIN/PSLP/CJ (GPIO9) V_STROBE/CC/DA(IN) (GPIO0) IASLEEP/DFCK/CE/RXA Binary Audio In (GPIO10) VOICE#/ADP/RDY/CD(GPIO2) SPKMUTE/CRXD/DSDT (GPIO8) DSPKOUT/CTXD/USDT//TXA (GPIO11) TCH_CLK/BITC (GPIO6) TCH_TX/UDT/TXA (GPIO5) TCH_RX/DDT/ BB/RX2B (GPIO4) TCH_FRAME/UFCK/BA/TX2B (GPIO3)
95 5 6 3 2 4 1 96 88 100 99 87 81 82 83 85
NC NC NC NC NC NC DA(IN) RX-A NC NC NC TX-A NC TX-A RX2-B USART TX2-B USART
GSM INTERFACE CONFIGURATION
GSM PHONE
100553_F3-1_ HIS 11250 100T
Figure 3-1. CX11250 HSD Hardware Interface Signals
3-4
Conexant
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SmartHSF Mobile Modem Data Sheet
TCH_FRAME/UFCK/BA/TX2B (GPIO3) LP_CLK
DSPKOUT/CTXD/USDT (GPIO11)
SPKMUTE/CRXD/DSDT (GPIO8)
TCH_RX/DDT/BB/RX2B (GPIO4) TCH_TX/UDT/TXA(GPIO5)
VOICE#/ADP/RDY/CD (GPIO2)
IASLEEP/DFCK/CE/RXA
TCH_CLK/BITC (GPIO6)
DIB_DATAP
Bin Audio In (GPIO10)
DRESET# (GPOL0) VDD PWRCLKN
DIB_DATAN
SROMOUT 77
PWRCLKP
SROMCLK
CLKRUN#
99
98
95
97
94
96
93
90
92
89
91
88
87
100
86
85
84
83
80
82
79
81
78
76
SROMCS
VauxDET
SROMIN
PLLVDD
PLLVSS
GND
V_STROBE/CC/DA(IN) (GPIO0) V_RXOUT/ASLP/CF (GPIO1) V_SCLK/CB (GPIO2) V_TXSIN/PSLP/CJ (GPIO9) M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL2 (GPIO13) VDD INTA# PCIRST# PCICLK GND GNT# REQ# PME# AD31 AD30 AD29 VDD AD28 AD27 AD26 VIO AD25 AD24 CBE3#
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 31 29 32 30 33 36 34 37 35 38 41 42 43 39 40 46 44 47 45 48 49 50
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
SDXTAL2 SDXTAL1 SCANMODE SCANEN VPCIDET VauxEN# VpciEN# VDD AD0 AD1 AD2 AD3 GND AD4 AD5 AD6 AD7 VDD CBE0# AD8 AD9 AD10 AD11 AD12 AD13
CX11250
IDSEL AD23
VDD
VIO
CBE2# FRAME#
STOP#
IRDY#
TRDY#
AD17 GND
AD22
AD20
AD21
AD19
AD18
AD16
PERR#
DEVSEL#
SERR#
VDD
PAR
CBE1# AD15
AD14
100553_F3-2_ PO-11250-100TQFP
Figure 3-2. CX11250 HSD 100-Pin TQFP Pin Signals
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SmartHSF Mobile Modem Data Sheet
Table 3-1. CX11250 HSD 100-Pin TQFP Pin Signals
Pin 1 Signal Label V_STROBE/ CC/ DA(IN) (GPIO0) V_RXOUT/ ASLP/ CF (GPIO1) V_SCLK/ CB (GPIO2) V_TXSIN/ PSLP/ CJ (GPIO9) M_CLK/ PANEL1 (GPIO12) V_CTRL/ PANEL2 (GPIO13) VDD INTA# PCIRST# PCICLK GND GNT# REQ# PME# AD31 AD30 AD29 VDD AD28 AD27 AD26 VIO AD25 AD24 CBE3# VIO IDSEL AD23 AD22 AD21 VDD AD20 I/O Type Itpd Interface Telephone Line: VC M_STROBE CDMA Phone: CC GSM Phone: DA(IN) Telephone Line: VC M_RXOUT PHS Phone: ASLP CDMA Phone: CF Telephone Line: VC M_SCK CDMA Phone: CB Telephone Line: VC M_TXSIN PHS Phone: PSLP CDMA Phone: CJ VC Telephone Line: VC M_CLKIN PDC Phone: Panel 1 CDMA Phone: Panel 1 Telephone Line: VC M_CNTRLSIN PDC Phone: Panel 2 CDMA Phone: Panel 2 +3.3V PCI Bus: INTA# PCI Bus: PCIRST# PCI Bus: PCICLK GND PCI Bus: GNT# PCI Bus: REQ# PCI Bus: PME# PCI Bus: AD31 PCI Bus: AD30 PCI Bus: AD29 +3.3V PCI Bus: AD28 PCI Bus: AD27 PCI Bus: AD26 PCI Bus: VI/O or +3.3V PCI Bus: AD25 PCI Bus: AD24 PCI Bus: CBE3# PCI Bus: VI/O or +3.3V PCI Bus: IDSEL PCI Bus: AD23 PCI Bus: AD22 PCI Bus: AD21 +3.3V PCI Bus: AD20 Pin 51 Signal Label AD13 I/O Type I/Opts Interface PCI Bus: AD13
2
Itk
52
AD12
I/Opts
PCI Bus: AD12
3 4
Itpd Ot2
53 54
AD11 AD10
I/Opts I/Opts
PCI Bus: AD11 PCI Bus: AD10
5
Ot2
55
AD9
I/Opts
PCI Bus: AD9
6
Ot2
56
AD8
I/Opts
PCI Bus: AD8
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PWR Opod Ip Ip GND Ipts Opts Opod I/Opts I/Opts I/Opts PWR I/Opts I/Opts I/Opts PWR I/Opts I/Opts I/Opts PWR Ip I/Opts I/Opts I/Opts PWR I/Opts
57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
CBE0# VDD AD7 AD6 AD5 AD4 GND AD3 AD2 AD1 AD0 VDD VpciEN# VauxEN# VpciDET SCANEN SCANMODE SDXTAL1 SDXTAL2 SROMCS SROMOUT SROMIN SROMCLK VauxDET TCH_CLK/ BITC (GPIO6) TCH_TX/ UDT/ TXA (GPIO5) TCH_RX/ DDT/ BB/ RX2B (GPIO4) LP_CLK
I/Opts PWR I/Opts I/Opts I/Opts I/Opts GND I/Opts I/Opts I/Opts I/Opts PWR Ot2 Ot2 Itpd Itpd Itpd Ix Ox Ot2 Ot2 Itpu Ot2 Itpd Itpu/Ot12 Itpu/Ot12
PCI Bus: CBE0# +3.3V PCI Bus: AD7 PCI Bus: AD6 PCI Bus: AD5 PCI Bus: AD4 GND PCI Bus: AD3 PCI Bus: AD2 PCI Bus: AD1 PCI Bus: AD0 +3.3V Pwr Detection/Switching Ckt Pwr Detection/Switching Ckt Pwr Detection/Switching Ckt GND GND Crystal or Clock Circuit Crystal or NC (if SDXTAL1 connected to Clock Circuit) SROM: Chip Select (CS) SROM: Data In (DI) SROM: Data Out (DO) SROM: Clock (SK) Pwr Detection/Switching Ckt PDC Phone: TCH_CLK PHS Phone: BITC PDC Phone: TCH_TX K PHS Phone: UDT GSM Phone: TXA PDC Phone: TCH_RX PHS Phone: DDT CDMA Phone: BB_RXD GSM Phone: RX2-B +3.3V through 240 K
33
AD19
I/Opts
PCI Bus: AD19
83
Itpu/Ot12
34
AD18
I/Opts
PCI Bus: AD18
84
RC
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Conexant
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SmartHSF Mobile Modem Data Sheet
Table 3-1. CX11250 HSD 100-Pin TQFP Pin Signals (Continued)
Pin 35 Signal Label AD17 I/O Type I/Opts Interface PCI Bus: AD17 Pin 85 Signal Label TCH_FRAME/ UFCK/ BA/ TX2B (GPIO3) CLKRUN# DSPKOUT/ CTXD/ USDT/ TXA (GPIO11) Bin Audio In (GPIO10) GND DIB_DATAN DIB_DATAP PWRCLKP PWRCLKN VDD DRESET# (GPOL0) IASLEEP/ DFCK/ CE/ RXA PLLVDD PLLVSS SPKMUTE/ CRXD/ DSDT (GPIO8) 50 AD14 I/Opts PCI Bus: AD14 100 VOICE#/ADP/ RDY/CD (GPIO2) Ot12 I/O Type Itpu/Ot12 Interface PDC Phone: TCH_FRAME PHS Phone: UFCK CDMA Phone: BA_TXD GSM Phone: TX2-B PCI Bus: CLKRUN# Telephone Line: Spkr circuit PDC Phone: CELL_TXD PHS Phone: USDT CDMA Phone: Control TXD GSM: TX-A Line Interface: Binary Audio Source GND DIB: Data Negative Channel DIB: Data Positive Channel DIB: Transformer primary winding non-dotted terminal DIB: Transformer primary winding dotted terminal +3.3V VC: POR Telephone Line: VC SLEEP PHS Phone: DFCK CDMA Phone: CE GSM Phone: RX-A +3.3V and to GND through 0.1 F GND Telephone Line: Spkr Circuit (Out); Vaux Mode Power Select (In) PDC Phone: CELL_RXD PHS Phone: DSDT CDMA Phone: Control RXD Telephone Line: Voice Relay Control PDC Phone: ADP PHS Phone: RDY CDMA Phone: CD
36 37
GND AD16
GND I/Opts
GND PCI Bus: AD16
86 87
I/Opod Ot12
38 39 40 41 42 43 44 45 46
CBE2# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR# PAR
I/Opts I/Opsts I/Opsts I/Opsts I/Opsts I/Opsts I/Opsts I/Opod I/Opts
PCI Bus: CBE2# PCI Bus: FRAME# PCI Bus: IRDY# PCI Bus: TRDY# PCI Bus: DEVSEL# PCI Bus: STOP# PCI Bus: PERR# PCI Bus: SERR# PCI Bus: PAR
88 89 90 91 92 93 94 95 96
Itpu GND Idd/Odd Idd/Odd Odpc Odpc PWR Ot2 Ot2
47 48 49
VDD CBE1# AD15
PWR I/Opts I/Opts
+3.3V PCI Bus: CBE1# PCI Bus: AD15
97 98 99
PWR GND It/Ot12
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SmartHSF Mobile Modem Data Sheet
NOTES: 1. I/O Types I/Opod I/Opsts I/Opts Idd Ip Ipts It Itk Itpd Itpu It/Ot2 It/Ot12 Ix Odpc Odd Ood Opod Opts Ot2 Ot12 Digital input/output, PCI, open drain (PCI type = o/d) Digital input/output, PCI, sustained three-state (PCI type = s/t/s) Digital input/output, PCI, three-state (PCI type = t/s) input, DIB, data channel Digital input, PCI, totem pole (PCI type = in) Digital input, PCI, (PCI type = t/s) Digital input, TTL-compatible Digital input, TTL-compatible, internal keeper Digital input, TTL-compatible, internal 75k 25k pull-down Digital input, TTL-compatible, internal 75k 25k pull-up Digital input, TTL-compatible/digital output, TTL-compatible, 2 mA, ZINTERNAL = 120 Digital input, TTL-compatible/digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 Crystal/clock input Output, DIB power and clock channel Output, DIB data channel Digital output, open drain Digital output, PCI, open drain (PCI type =o/d) Digital output, PCI, three-state (PCI type = t/s) Digital output, TTL-compatible, 2 mA, ZINTERNAL = 120 Digital output, TTL-compatible, 12 mA, ZINTERNAL = 32
Ox Crystal output 2. Interface Legend: NC No internal pin connection DIB Digital Isolation Barrier VC Voice Codec 3. All references to PCI Bus also apply to Mini PCI unless otherwise specified.
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Conexant
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SmartHSF Mobile Modem Data Sheet
Table 3-2. CX11250 HSD Pin Signal Definitions
Label SDXTAL1 SDXTAL2 VDD GND VIO LP_CLK PLLVDD PLLGND SCANEN SCANMODE CLKRUN# 74 75 7, 18, 31, 47, 58, 68, 94 11, 36, 63, 89 22, 26 84 97 98 72 73 86 P G I I I Pin I/O I O P G P I/O Type SYSTEM Ix Ox PWR GND PWR RC PWR GND Itpd Itpd I/Opod, (o/d) Crystal/Clock In and Crystal Out. Connect SDXTAL1 to a 28.224000 MHz crystal or clock circuit. Connect SDXTAL2 to the 28.224000 MHz crystal circuit or leave open if SDXTAL1 is connected to a clock circuit. Digital Supply Voltage. Connect to +3.3V. Digital Ground. Connect to digital ground. I/O Signaling Voltage Reference. Connect to PCI Bus VI/O or +3.3V. Used internally for PCI clamping. Low Power Clock RC Circuit. Connect to +3.3V through 240 K. Digital Supply Voltage. Connect to +3.3V and to GND through 0.1 F. Digital Ground. Connect to digital ground. Scan Enable. Connect to GND. Scan Mode. Connect to GND. Clock Running. CLKRUN# is an input used to determine the status of CLK and an open drain output used to request starting or speeding up CLK. Connect to GND for PCI Bus designs. Connect to CLKRUN# pin for Mini PCI designs. POWER DETECTION VpciDET 71 I Itpd Vpci Detect. The VpciDET input indicates when PCI cycles and PCIRST# are to be ignored. Connect this pin to the PCI Bus +5V pins for PCI Bus designs or to PCI 3.3V for Mini PCI designs. VpciDET is deasserted when the PCI Bus enters the B3 state. This pin may alternatively be directly driven in embedded designs by using a logical signal, either +5V or +3.3V level, to indicate when the PCI Bus is in a B3 state. Driving this pin low synchronously to the PCI clock or when the PCI clock is stopped also allows the HSD to be put into a very low power mode. Using this method, if modem operation is not required, modem power consumption can be reduced even while the PCI Bus is in power state B0. VauxDET 80 I Itpd Vaux Detect. Active high input used to detect the presence of Vaux. Connect to PCI Bus: Vaux. At device power on (POR), if D3_Cold bit in the EEPROM is a 1, PMC[15] is set to a 1 if VauxDET is high or PMC[15] is cleared to a 0 if VauxDET is low. Vpci Enable. Active low output used to enable Vpci FET. For use in designs that switch between Vaux and Vpci for different power states and for retail designs where the target PC may or may not support Vaux. Vaux Enable. Active low output used to enable Vaux FET. For use in designs that switch between Vaux and Vpci for different power states and for retail designs where the target PC may or may not support Vaux. SERIAL EEPROM INTERFACE SROMCLK SROMCS SROMIN SROMOUT 79 76 78 77 O O I O Ot2 Ot2 Itpu Ot2 Serial ROM Shift Clock. Connect to SROM SK input (frequency: 537.6 kHz). Serial ROM Chip Select. Connect to SROM CS input. Serial ROM Device Status and Data Out. Connect to SROM DO output, through 1 k if using a +5V EEPROM. Serial ROM Instruction, Address, and Data In. Connect to SROM DI input. Signal Name/Description
VpciEN#
69
O
Ot2
VauxEN#
70
O
Ot2
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SmartHSF Mobile Modem Data Sheet
Table 3-2. CX11250 HSD Pin Signal Definitions (Continued)
Label PCICLK PCIRST# 10 9 Pin I I I/O I/O Type PCI BUS INTERFACE Ip (in) Ip (in) I/Opts (t/s) PCI Bus Clock. The PCICLK (PCI Bus CLK signal) input provides timing for all transactions on PCI. Connect to PCI Bus: CLK. PCI Bus Reset. Active low input asserted to initialize PCI-specific registers, sequencers, and signals to a consistent reset state. Connect to PCI Bus: RST#. Multiplexed Address and Data. Address and Data are multiplexed on the same PCI pins. Connect to PCI Bus: AD[31-0]. Signal Name/Description
AD[31:0]
15-17, 19-21, 23-24, 28-30, 32-35, 37, 4956, 59-62, 6467 57 48 38 25 46
I/O
CBE0# CBE1# CBE2# CBE3# PAR
I/O
I/Opts (t/s)
Bus Command and Bus Enable. Bus Command and Byte Enables are multiplexed on the same PCI pins. During the address phase of a transaction, CBE[3:0]# define the bus command. During the data phase, CBE[3:0]# are used as Byte Enables. Connect to PCI Bus: CBE[3:0]#. Parity. Parity is even parity across AD[31:00] and CBE[3:0]#. The master drives PAR for address and write data phases; the Bus Interface drives PAR for read data phases. Connect to PCI Bus: PAR. Cycle Frame. FRAME# is driven by the current master to indicate the beginning and duration of an access. Connect to PCI Bus: FRAME#. Initiator Ready. IRDY# is used to indicate the initiating agent's (bus master's) ability to complete the current data phase of the transaction. IRDY# is used in conjunction with TRDY#. Connect to PCI Bus: IRDY#. Target Ready. TRDY# is used to indicate s the Bus Interface's ability to complete the current data phase of the transaction. TRDY# is used in conjunction with IRDY#. Connect to PCI Bus: TRDY#. Stop. STOP# is asserted to indicate the Bus Interface is requesting the master to stop the current transaction. Connect to PCI Bus: STOP#. Initialization Device. IDSEL input is used as a chip select during configuration read and write transactions. Connect to PCI Bus: IDSEL. Device Select. When actively driven, DEVSEL# indicates the driving device has decoded its address as the target of the current access. As an input, DEVSEL# indicates whether any device on the bus has been selected. Connect to PCI Bus: DEVSEL#. Request. REQ# is used to indicate to the arbiter that this agent desires use of the bus. Connect to PCI Bus: REQ#. Grant. GNT# is used to indicate to the agent that access to the bus has been granted. Connect to PCI Bus: GNT#. Parity Error. PERR# is used for the reporting of data parity errors. Connect to PCI Bus: PERR#. System Error. SERR# is an open drain output asserted to report address parity errors, data parity errors on the Special Cycle command, or any other system error where the result will be catastrophic. Connect to PCI Bus: SERR#. Interrupt A. INTA# is an open drain output asserted to request an interrupt. Connect to PCI Bus: INTA#. Power Management Event. Active low open drain or active high TTL output (selected by the PME DRV bit in the EEPROM) asserted when a valid ring signal is detected and the PME_En bit of the PMCSR is a 1. This signal should be used only if the target PCI Bus supports power management wake-up event. Connect to the PCI Bus: PME#. Status Changed. Active low output asserted to alert the host to changes in the RRdy/-Bsy bit (PRR1) in the Pin Replacement Register (PRR) and to the setting of the ReqAttn bit (ESR4) in the Extended Status Register (ESR).
I/O
I/Opts (t/s) I/Opsts (s/t/s) I/Opsts (s/t/s) I/Opsts (s/t/s) I/Opsts (s/t/s) Ip (in) I/Opsts (s/t/s)
FRAME# IRDY#
39 40
I/O I/O
TRDY#
41
I/O
STOP# IDSEL DEVSEL#
43 27 42
I/O I I/O
REQ# GNT# PERR# SERR#
13 12 44 45
O I I/O O
Opts (t/s) Ipts (t/s) I/Opsts (s/t/s) Opod (o/d)
INTA# PME#
8 14
O O
Opod (o/d) Opod (o/d)
STSCHG#
14
O
Opod (o/d)
3-10
Conexant
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SmartHSF Mobile Modem Data Sheet
Table 3-2. CX11250 HSD Pin Signal Definitions (Continued)
Label PWRCLKP PWRCLKN DIB_DATAP DIB_DATAN 92 93 91 90 Pin I/O O O I/O I/O I/O Type DIB INTERFACE Odpc Odpc Idd/Odd Idd/Odd Clock and Power Positive. Provides clock and power to the LSD. Connect to DIB transformer primary winding non-dotted terminal. Clock and Power Negative. Provides clock and power to the LSD. Connect to DIB transformer primary winding dotted terminal. Data Positive. Transfers data, control, and status information between HSD and LSD. Connect to LSD through DIB data positive channel components. Data Negative. Transfers data, control, and status information between HSD and LSD. Connect to LSD through DIB data negative channel components. Modem Reset. Connect to VC POR pin. Master Clock Output. Connect to VC M_CLKIN pin. Voice Control Output. Connect to VC M_CNTRLSIN pin. Voice Serial Clock input. Connect to VC M_SCK pin. Voice Serial Receive Data Input. Connect to VC M_RXOUT pin. Voice Serial Transmit Data Output. Connect to VC M_TXSIN pin. Voice Serial Frame Sync Input. Connect to VC M_STROBE pin. Modem Sleep. Connect to VC SLEEP pin. Voice Relay Control. Output (typically active low) used to control the normally open voice relay. The polarity of this output is configurable. Speaker Mute/Vaux Mode Power Select. Output (typically active low) used to turn off (mute) the speaker during normal operation. Applicable to S models only. Upon device reset, this pin is temporarily an input and is sampled. If sampled high and VauxDET is high, VpciEN# will be asserted when the device is in D0. If sampled low (e.g., SPKMUTE signal is pulled down to GND through 10k ) and VauxDET is high, VauxEN# will be asserted when the device is in D0. VauxEN# is always asserted when VauxDET is high in D3 with PME enabled. Either VauxEN# or VpciEN#, but not both, can be asserted at the same time. DSPKOUT/ CTXD/ USDT/CNTL_TX D (GPIO11) Bin Audio In (GPIO10) 87 O Ot12 Call Progress (Digital Speaker) Output. The DSPKOUT digital output reflects the received analog input signal digitized to TTL high or low level by an internal comparator. This signal is used for call progress or carrier monitoring. This output can be optionally connected to a low-cost on-board speaker, e.g., a sounducer, or to an analog speaker circuit. Binary Audio Input. Binary audio source. Signal Name/Description
TELEPHONE LINE (DAA)/AUDIO INTERFACE DRESET# (GPOL0) M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL 2 (GPIO13) V_SCLK/CB (GPIO2) V_RXOUT/ASLP/ CF (GPIO1) V_TXSIN/PSLP/ CJ (GPIO9) V_STROBE/CC/ DA(IN) (GPIO0) IASLEEP/ DFCK/CE/RXA VOICE#/ADP/ RDY/CD (GPIO2) SPKMUTE/ CRXD/DSDT/ (GPIO8) 95 5 6 3 2 4 1 96 100 O O O I I O I O O Ot2 Ot2 Ot2 Itpd It Ot2 Itpd Ot2 Ot12
99
I/O
It/Ot12
88
I
Itpu
100553B
Conexant
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SmartHSF Mobile Modem Data Sheet
Table 3-2. CX11250 HSD Pin Signal Definitions (Continued)
Label M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL 2 (GPIO13) VOICE#/ADP/ RDY/CD (GPIO2) SPKMUTE/ CRXD/ DSDT/ (GPIO8) DSPKOUT/ CTXD/USDT/ (GPIO11) TCH_CLK/BITC (GPIO6) TCH_TX/UDT/ TXA(GPIO5) TCH_RX/DDT/ BB_RXD/RX2B (GPIO4) TCH_FRAME/ UFCK/BA_TXD/ TX2B (GPIO3) V_RXOUT/ASLP/ CF (GPIO1) V_TXSIN/PSLP/ CJ (GPIO9) IASLEEP/DFCK/ CE/RXA VOICE#/ADP/ RDY/CD(GPIO2) SPKMUTE/ CRXD/DSDT (GPIO8) DSPKOUT/ CTXD/USDT (GPIO11) TCH_CLK/ BITC (GPIO6) TCH_TX/UDT/ TXA (GPIO5) TCH_RX/DDT/ BB_RXD/RX2B (GPIO4) TCH_FRAME/ UFCK/BA_TXD/ TX2B (GPIO3) 5 6 100 Pin I/O O O O I/O Type Itpu/Ot12 Itpu/Ot12 Ot12 Signal Name/Description Panel 1. Defined by the PDC firmware driver. Panel 2. Defined by the PDC firmware driver. ADP. Defined by the PDC firmware driver. PDC/PDC PACKET PHONE INTERFACE
99
I
It/Ot12
CELL_RXD. Defined by the PDC firmware driver.
87
O
Ot12
CELL_TXD. Defined by the PDC firmware driver.
81 82 83
I O I
Itpu/Ot12 Itpu/Ot12 Itpu/Ot12
TCH_CLK. Defined by the PDC firmware driver. TCH_TX. Defined by the PDC firmware driver. TCH_RX. Defined by the PDC firmware driver.
85
I
Itpu/Ot12
TCH_FRAME. Defined by the PDC firmware driver.
PHS PHONE INTERFACE 2 4 96 100 99 I O I O I It It/Ot2 It/Ot2 Ot12 It/Ot12 ASLP. Defined by the PHS firmware driver. PSLP. Defined by the PHS firmware driver. DFCK. Defined by the PHS firmware driver. Ready. Defined by the PHS firmware driver. DSDT. Defined by the PHS firmware driver.
87
O
Ot12
USDT. Defined by the PHS firmware driver.
81 82 83
I O I
Itpu/Ot12 Itpu/Ot12 Itpu/Ot12
BITC. Defined by the PHS firmware driver. UDT. Defined by the PHS firmware driver. DDT. Defined by the PHS firmware driver.
85
I
Itpu/Ot12
UFCK. Defined by the PHS firmware driver.
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Conexant
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SmartHSF Mobile Modem Data Sheet
Table 3-2. CX11250 HSD Pin Signal Definitions (Continued)
Label M_CLK/PANEL1 (GPIO12) V_CTRL/PANEL 2 (GPIO13) V_SCLK/CB (GPIO2) V_RXOUT/ASLP/ CF (GPIO1) V_TXSIN/PSLP/ CJ (GPIO9) V_STROBE/CC/ DA(IN) (GPIO0) IASLEEP/DFCK/ CE/RXA VOICE#/ADP/ RDY/CD(GPIO2) SPKMUTE/ CRXD/DSDT/ (GPIO8) DSPKOUT/ CTXD/USDT/ (GPIO11) TCH_RX/DDT/ BB/RX2B (GPIO4) TCH_FRAME/ UFCK/BA/TX2B (GPIO3) V_STROBE/CC/ DA(IN) (GPIO0) IASLEEP/DFCK/ CE/RXA DSPKOUT/ CTXD/USDT/ TXA(GPIO11) TCH_TX/UDT/ TXA(GPIO5) TCH_RX/DDT/ BB/RX2B (GPIO4) TCH_FRAME/ UFCK/BA/ TX2B (GPIO3) 5 6 3 2 4 1 96 100 99 Pin I/O O O I I O I I O I I/O Type CDMA PHONE INTERFACE Itpu/Ot12 Itpu/Ot12 Itpd It Ot2 Itpd Ot2 Ot12 It/Ot12 Panel 1. Defined by the CDMA firmware driver. Panel 2. Defined by the CDMA firmware driver. CB. Defined by the CDMA firmware driver. CF. Defined by the CDMA firmware driver. CJ. Defined by the CDMA firmware driver. CC. Defined by the CDMA firmware driver. CE. Defined by the CDMA firmware driver. CD. Defined by the CDMA firmware driver. Control RXD. Defined by the CDMA firmware driver. Signal Name/Description
87
O
Ot12
Control TXD. Defined by the CDMA firmware driver.
83
I
Itpu/Ot12
BB (USART IN). Defined by the CDMA firmware driver.
85
O
Itpu/Ot12
BA (USART OUT). Defined by the CDMA firmware driver.
GSM PHONE INTERFACE 1 96 87 I I O Itpd It/Ot2 Ot12 DA(IN). Defined by the GSM firmware driver. RX-A. Defined by the GSM firmware driver. TX-A. Defined by the GSM firmware driver.
82 83
O I
Itpu/Ot12 Itpu/Ot12
TX-A. Defined by the GSM firmware driver. RX2-B USART. Defined by the GSM firmware driver.
85
O
Itpu/Ot12
TX2-B USART. Defined by the GSM firmware driver.
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SmartHSF Mobile Modem Data Sheet
Table 3-2. CX11250 HSD Pin Signal Definitions (Continued)
NOTES: 1. I/O Types I/Opod I/Opsts I/Opts Idd Ip Ipts It Itpd Itpu It/Ot2 It/Ot12 Ix Odpc Odd Ood Opod Opts Ot2 Ot12 Digital input/output, PCI, open drain (PCI type = o/d) Digital input/output, PCI, sustained three-state (PCI type = s/t/s) Digital input/output, PCI, three-state (PCI type = t/s) input, DIB, data channel Digital input, PCI, totem pole (PCI type = in) Digital input, PCI, (PCI type = t/s) Digital input, TTL-compatible Digital input, TTL-compatible, internal 75k 25k pull-down Digital input, TTL-compatible, internal 75k 25k pull-up Digital input, TTL-compatible/digital output, TTL-compatible, 2 mA, ZINTERNAL = 120 Digital input, TTL-compatible/digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 Crystal/clock input Output, DIB power and clock channel Output, DIB data channel Digital output, open drain Digital output, PCI, open drain (PCI type =o/d) Digital output, PCI, three-state (PCI type = t/s) Digital output, TTL-compatible, 2 mA, ZINTERNAL = 120 Digital output, TTL-compatible, 12 mA, ZINTERNAL = 32
Ox Crystal output 2. Interface Legend: NC = No internal pin connection RESERVED = No external connection allowed (may have internal connection). 3. All references to PCI Bus also apply to Mini PCI unless otherwise specified.
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SmartHSF Mobile Modem Data Sheet
Table 3-3. Cell Phone/Telephone Line Interface Signals
Application Signal and I/O Direction PSTN Selected Pin Pin Name PSTN Signal PDC/PDC Packet Selected PDC I/O O O O I O I O I I PHS Selected PHS Signal ASLP PSLP DFCK RDY DSDT USDT BITC UDT DDT UFCK PHS I/O I O I O I O I O I I CDMA Selected CDMA Signal Panel 1 Panel 2 CB CF CJ CC CE CD Control RXD Control TXD BB (USART IN) BA (USART OUT) CDM A I/O O O I I O I I O I O TX-A I O RX2-B USART TX2-B USART O I O GSM Selected GSM Signal DA(IN) RX-A TX-A GSM I/O I I O
PSTN PDC/ I/O PDC packet Signal O O O I I O I O O O O Panel 1 Panel 2 ADP CELL_RXD CELL_TXD TCH_CLK TCH_TX TCH_RX TCH_FRAME
DRESET# (GPOL0) DRESET# M_CLK/PANEL1 M_CLK (GPIO12) 6 V_CTRL/PANEL2 V_CTRL (GPIO13) 3 V_SCLK/CB (GPIO7) V_SCLK 2 V_RXOUT/ASLP/CF V_RXOUT (GPIO1) 4 V_TXSIN/PSLP/CJ V_TXSIN (GPIO9) 1 V_STROBE/CC/ V_STROBE DA(IN) (GPIO0) 96 IASLEEP/DFCK/CE/RXA IASLEEP 100 VOICE#/ADP/RDY/CD VOICE# (GPIO2) 99 87 81 82 83 85 SPKMUTE/CRXD/ SPKMUTE DSDT (GPIO8) DSPKOUT/CTXD/ DSPKOUT USDT/TXA (GPIO11) TCH_CLK/BITC (GPIO6) TCH_TX/UDT/TXA (GPIO5) TCH_RX/DDT/BB/RX2B (GPIO4) TCH_FRAME/UFCK/ BA/TX2B (GPIO3)
95 5
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SmartHSF Mobile Modem Data Sheet 3.2 3.2.1 CX20463 SmartDAA LSD HARDWARE PINS AND SIGNALS LSD Signal Interfaces
HSD Interface (Through DIB) The DIB interface signals are: * Clock (CLK); input * Digital Power (PWR+); input power * Digital Ground (DGND); digital ground * Data Positive (DIB_P); input * Data Negative (DIB_N); input Telephone Line Interface The telephone line interface signals are: * RING AC Coupled (RAC1); input * TIP AC Coupled (TAC1); input * Electronic Inductor Resistor (EIR); output * TIP and RING DC Measurement (TRDC); input * DAC Output Voltage (DAC); output * Electronic Inductor Capacitor (EIC) * Electronic Inductor Output (EIO) * Electronic Inductor Feedback (EIF) * Resistive Divider Midpoint (DCF) * Transmit Analog Output (TXA); output * Receive Analog Input (RXI); input * Receiver Gain (RXG); output * MOV Enable (MOVEN); output * Worldwide Impedance 0 (ZW0); input * US Impedance 0 (ZUS0); input * Transmit Feedback (TXF); input * Transmit Output (TXO); output
3.2.2
LSD Interface Signals, Pin Assignments, and Signal Definitions
LSD 32-pin TQFP hardware interface signals are shown by major interface in Figure 3-3, are shown by pin number in Figure 3-4, and are listed by pin number in Table 3-4. LSD hardware interface signals are defined in Table 3-5. LSD pin signal digital electrical characteristics are defined in Table 3-6.
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SmartHSF Mobile Modem Data Sheet
RAC2 TAC2
10 12
NC NC
RAC1 TAC1
9 11
Ring Filter Electronic Inductor, Off-Hook, Pulse Dial, and TIP and RING VI Control Echo Cancellation and Receiver Pulse Dial Voltage Protection (Country Specific) Impedance Matching and Transmitter
DIGITAL ISOLATION BARRIER (DIB)
C110
R32
C26 R125
27 31 24 26
CX20463 SMARTDAA LINE SIDE DEVICE (LSD) 32-PIN TQFP
CLK PWR+ AVDD DVDD
EIR EIC DAC TRDC EIO EIF
15 2 6 5 21 22
RXI RXG TXA
3 4 18
Safety and EMI Protection
Telephone Line Connector
TIP RING
AGND_LSD
R110
POWER AND CLOCK CHANNEL
D4 C62 C70 R120 D2
DVDD R124
MOVEN (GPIO1)
32
PWRCLKN
C72 C30 C28
R112
PWRCLKP
C112
25 23
GND_LSD AGND_LSD R34
DGND AGND
ZW0 ZUS0 TXO TXF
14 17 20 19
DATA CHANNEL
DCF DIB_P VREF
16
DIB_DATAP
C22
28
AGND_LSD
8
C42 C45 C76
R36
DIB_DATAN
C24
29
DIB_N VC 7
DVDD
30
POR
C44
C74
AGND_LSD
NOTES: 1. Consult applicable reference design for exact component placement and values. 2. R125 is usually installed. 3. R124 is usually removed.
GPIO2
AGND_LSD AGND_LSD
RBIAS
13
R54
1
NC
100491_F3-09_HI CX20463
Figure 3-3. CX20463 LSD Hardware Interface Signals
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
MOVEN (GPIO1) PWR+ POR DIB_N DIB_P CLK DVDD DGND
GPIO2 EIC RXI RXG TRDC DAC VC VREF
1 2 3 4 5 6 7 8
CX20463
9 10 11 12 13 14 15 16
AVDD AGND EIF EIO TXO TXF TXA ZUS0
RAC1 RAC2 TAC1 TAC2 RBIAS ZW0 EIR DCF
100491F3-7 PO-20463-32T
Figure 3-4. CX20463 LSD 32-Pin TQFP Pin Signals
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SmartHSF Mobile Modem Data Sheet
Table 3-4. CX20463 LSD 32-Pin TQFP Pin Signals
Pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 NOTES: 1. I/O types*: Ia It Oa Ot12
Signal Label
GPIO2 EIC RXI RXG TRDC DAC VC VREF RAC1 RAC2 TAC1 TAC2 RBIAS ZW0 EIR DCF ZUS0 TXA TXF TXO EIO EIF AGND AVDD DGND DVDD CLK DIB_P DIB_N POR PWR+ MOVEN (GPIO1)
I/O Type
It/Ot12 Oa Ia Oa Oa Oa REF REF Ia Ia Ia Ia Ia Ia Ot12 Ia Ia Oa Ia Oa Oa Ia AGND_LSD PWR GND_LSD PWR I I/O I/O It PWR Ot12
Interface
NC Telephone Line Interface Components Telephone Line Interface Components Telephone Line Interface Components Telephone Line Interface Components Telephone Line Interface Components VREF through C42 and to AGND_LSD through C44 and C74 VC through C42 and to AGND_LSD through C45 and C76 Diode bridge top AC connection (RING) through R2 and C2 NC Diode bridge bottom AC connection (TIP) through R4 and C4 NC AGND_LSD through R54 Telephone Line Interface Components Telephone Line Interface Components AGND_LSD Telephone Line Interface Components Telephone Line Interface Components Telephone Line Interface Components Telephone Line Interface Components Telephone Line Interface Components Telephone Line Interface Components AGND_LSD LSD DVDD pin DIB transformer secondary winding undotted terminal through diode D2 and R120 in series and to GND_LSD LSD AVDD pin, to GND_LSD through C28, C30, and C72 in parallel, and to DIB transformer secondary winding dotted terminal through R124. DIB transformer secondary winding undotted terminal through C26 and R32 in series, and through R120 shared with LSD DGND pin through diode D2 DIB C22 through R34 DIB C24 through R36 LSD DVDD pin DIB transformer secondary winding dotted terminal through R125 and to GND_LSD through zener diode D4 and C70 in parallel Telephone Line Interface Components
Analog input Digital input, TTL-compatible (See Table 3-6) Analog output Digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 (See Table 3-6)
AGND_LSD Isolated LSD Analog Ground GND_LSD Isolated LSD Digital Ground 2. Refer to applicable reference design for exact component placement and values.
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SmartHSF Mobile Modem Data Sheet
Table 3-5. CX20463 LSD Pin Signal Definitions
Label AVDD AGND POR VREF VC 24 23 30 8 7 Pin I/O Type SYSTEM SIGNALS PWR AGND_LSD It REF REF Analog Power Supply. Connect to the LSD DVDD pin. LSD Analog Ground. LSD Analog Ground. Connect to AGND_LSD at the GND_LSD/AGND_LSD tie point and to the analog ground plane. Power-On Reset. Connect to LSD DVDD pin. Output Reference Voltage. Connect to VC through C42 and to AGND_LSD through C45 and C76. Ensure a very close proximity between C42 and C45 and the VREF pin. Output Middle Reference Voltage. Connect to VREF through V42 and to AGND_LSD through C44 and C74. Ensure a very close proximity between C44 and the VC pin. Use a short path and a wide trace to AGND_LSD pin. DIB INTERFACE SIGNALS CLK 27 I Clock. Provides input clock, AC-coupled, to the LSD. Connect to DIB transformer secondary winding undotted terminal through R32 and C26 in series, and through R120 shared with LSD DGND pin through diode D2. Digital Power Input. Provides unregulated input digital power to the LSD. Connect to DIB transformer secondary winding dotted terminal through R125, and to GND_LSD though zener diode D4 and C70 in parallel. Digital Power. Connect to pin 24 (AVDD), to DIB transformer secondary winding dotted terminal through R124, and to GND_LSD through C28, C30, and C72 in parallel. LSD Digital Ground. Connect to DIB transformer secondary winding undotted terminal through diode D2 in series with R120, and to GND_LSD at the GND_LSD/AGND_LSD tie point. Data and Control Positive. Connect to HSD DIB_DATAP through C22 in the DIB and R34 on the LSD side. DIB_P and DIB_N signals are differential, and ping-pong between DIB and HSD (half duplex). Data and Control Negative. Connect to HSD DIB_DATAN through C24 in the DIB and R36 on LSD side. DIB_P and DIB_N signals are differential, and ping-pong between DIB and HSD (half duplex). TIP AND RING INTERFACE RAC1, TAC1 9, 11 Ia, Ia RING1 AC Coupled and TIP1 AC Coupled. AC-coupled voltage from telephone line used to detect ring. Connect RAC1 to the diode bridge AC top connection (RING) through R2 and C2. Connect TAC1 to the diode bridge AC bottom connection (TIP) through R4 and C4. RING2 AC Coupled and TIP2 AC Coupled. Not used. Leave open. Electronic Inductor Resistor. Electronic inductor resistor switch. Electronic Inductor Capacitor Switch. Internally switched to no connect when pulse dialing and to ground all other times. This is needed to eliminate pulse dial interference from the electronic inductor AC filter capacitor. DAC Output Voltage. Output voltage of the reference DAC. TIP and RING DC Measurement. Input on-hook voltage (from a resistive divider). Used internally to extract TIP and RING DC voltage and Line Polarity Reversal (LPR) information. Electronic Inductor Output. Calculated voltage is applied to this output to control offhook, pulse dial, and DC IV mask operation. Electronic Inductor Feedback. Electronic inductor feedback. Receiver Gain. Receiver operational amplifier output. Receive Analog Input. Receiver operational amplifier inverting input. Transmit Analog Output. Transmit signal used for canceling echo in the receive path. MOV Enable. Connect to pulse dial voltage protection circuit for Australia/Poland/Italy use. Leave open if the product is not intended for Australia, Poland, or Italy. Receiver Bias. Connect to GND through R54. Resistive Divider Midpoint. Connect to LSD analog ground. Signal Name/Description
PWR+
31
PWR
DVDD DGND
26 25
PWR GND_LSD
DIB_P
28
I/O
DIB_N
29
I/O
RAC2 TAC2 EIR EIC
10, 12 15 2
Ia, Ia Oa Oa
DAC TRDC
6 5
Oa Ia
EIO EIF RXG RXI TXA MOVEN (GPIO1) RBIAS DCF
21 22 4 3 18 32 13 16
Oa Ia Oa Ia Oa Ot12 Ia Ia
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SmartHSF Mobile Modem Data Sheet
Table 3-5. CX20463 LSD Pin Signal Definitions (Continued)
Label ZW0 ZUS0 TXO TXF GPIO2 NOTES: 1. I/O types*: Ia It Oa Ot12 14 17 20 19 1 Pin Ia Ia Oa Ia It/Ot12 I/O Type Signal Name/Description Worldwide Impedance 0. Input signal used to provide line complex impedance matching for worldwide countries. US Impedance 0. Input signal used to provide line impedance matching for U.S. Transmit Output. Outputs transmit signal and impedance matching signal; connect to transmitter transistor (Q6). Transmit Feedback. Connect to emitter of transmitter transistor (Q6). NOT USED General Purpose I/O 2. Leave open if not used. TELEPHONE LINE INTERFACE (CONTINUED)
Analog input Digital input, TTL-compatible (see Table 3-6) Analog output Digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 (see Table 3-6)
AGND_LSD Isolated LSD Analog Ground GND_LSD Isolated LSD Digital Ground 2. Refer to applicable reference design for exact component placement and values.
Table 3-6. CX20463 LSD DC Electrical Characteristics
Parameter Input Voltage Low Input Voltage Low Input Voltage High Output Voltage Low Output Voltage High Input Leakage Current Output Leakage Current (High Impedance) GPIO Output Sink Current at 0.4 V maximum GPIO Output Source Current at 2.97 V minimum GPIO Rise Time/Fall Time Symbol VIN VIL VIH VOL VOH - - - - Min. -0.30 - 1.6 0 2.97 -10 -10 2.4 2.4 20 Typ. - - - - - - - - - Max. 3.60 1.0 - 0.33 - 10 10 100 Units V V V V V A A mA mA ns Test Conditions VDD = +3.6V
Test conditions unless otherwise noted: 1. Test Conditions unless otherwise stated: VDD = +3.3 0.3 VDC; TA = 0C to 70C; external load = 50 pF
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SmartHSF Mobile Modem Data Sheet 3.3 CX20437 VC HARDWARE PINS AND SIGNALS (S MODELS)
Microphone and analog speaker interface signals, as well as telephone handset/headset interface signals are provided to support functions such as speakerphone mode, telephone emulation, microphone voice record, speaker voice playback, and call progress monitor.
3.3.1
VC Signal Interfaces
Speakerphone Interface The following signals are supported: * Speaker Out (M_SPKR_OUT); analog output - Should be used in speakerphone designs where sound quality is important * Microphone (M_MIC_IN); analog input Telephone Handset/Headset Interface The following interface signals are supported: * Telephone Input (M_LINE_IN), input (TELIN) -Optional connection to a telephone handset interface circuit * Telephone output (M_LINE_OUTP); output (TELOUT) - Optional connection to a telephone handset interface circuit * Center Voltage (VC); output reference voltage HSD Interface The following interface signals are supported: * Reset (POR); input * Sleep (SLEEP); input * Master Clock (M_CLKIN); input * Serial Clock (M_SCK); output * Control (M_CNTRLSIN); input * Serial Frame Sync (M_STROBE); output * Serial Transmit Data (M_TXSIN); input * Serial Receive Data (M_RXOUT); output
3.3.2
VC Interface Signals, Pin Assignments, and Signal Definitions
VC 32-pin TQFP hardware interface signals are shown by major interface in Figure 3-5, are shown by pin number in Figure 3-6, and are listed by pin number in Table 3-7. VC hardware interface signals are defined in Table 3-8. VC pin signal DC electrical characteristics are defined in Table 3-9. VC pin signal analog electrical characteristics are defined in Table 3-10.
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SmartHSF Mobile Modem Data Sheet
CX11250 HSD
IASLEEP DRESET# M_CLK V_SCLK V_STROBE V_TXSIN V_RXOUT V_CTRL
1 4 19 21 23 20 22 18
M_DIG_SPEAKER SLEEP POR M_CLKIN M_SCK M_STROBE M_TXSIN M_RXOUT M_CNTRLSIN M_MIC_IN M_SPKR_OUT
2 13 3
NC MIC SPKOUT AUDIO CIRCUIT
M_LINE_IN M_LINE_OUTP
14 9
TELIN TELOUT
HANDSET INTERFACE
+3.3V
17 25 5 28 26
VDD VDD MAVDD
CX20437 VOICE CODEC M_LINE_OUTM (VC) 32-PIN TQFP
VREF
10 11
0.1 10
NC
FERRITE
VAA (+3.3V)
VC_HAND 12
FERRITE
VSS SET3V_BAR2
VC
GND
0.1
10
6 27
MAVSS VSUB
AGND
M_MIC_BIAS M_RELAYA M_RELAYB M_ACT90 M_1BIT_OUT D_LPBK_BAR NC NC NC
15 24 16 29 30 31 7 8 32
AGND
NC
100533_F3-5_HI_20437 32T
Figure 3-5. CX20437 VC Hardware Interface Signals
NC D_LPBK_BAR
32 31 30 29 28
27 26 25 24 23 22 21 20
M_1BIT_OUT M_ACT90 VSS VSUB
SET3V_BAR2 VDD
SLEEP M_DIG_SPEAKER M_SPKR_OUT POR MAVDD MAVSS NC NC
1 2 3 4 5 6 7 8 9 10
M_RELAYA M_STROBE M_RXOUT M_SCK M_TXSIN M_CLKIN M_CNTRLSIN VDD
CX20437
11 12 13 14 15 16
19 18 17
M_LINE_OUTP M_LINE_OUTM
VREF VC M_MIC_IN M_LINE_IN M_MIC_BIAS M_RELAYB
100491 F3-8 PO-CX20437
Figure 3-6. CX20437 VC 32-Pin TQFP Pin Signals
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SmartHSF Mobile Modem Data Sheet
Table 3-7. CX20437 VC 32-Pin TQFP Pin Signals
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Signal Label SLEEP M_DIG_SPEAKER M_SPKR_OUT POR MAVDD MAVSS NC NC M_LINE_OUTP (TELOUT) M_LINE_OUTM VREF VC M_MIC_IN M_LINE_IN (TELIN) M_MIC_BIAS M_RELAYB VDD M_CNTRLSIN M_CLKIN M_TXSIN M_SCK M_RXOUT M_STROBE M_RELAYA VDD M_SET3V_BAR2 VSUB VSS M_ACT90 M_1BIT_OUT D_LPBK_BAR NC I I I/O I O O I I/O Type Itpd Ot2 Oa Itpu PWR AGND Interface HSD: IASLEEP NC Speaker interface circuit HSD: DRESET# VAA (+3.3V) AGND NC NC Handset interface circuit NC VC through capacitors AGND through ferrite bead and capacitors and to and to handset interface circuit (VC_HAND) through ferrite bead Microphone interface circuit Handset interface circuit NC NC +3.3V HSD: V_CTRL HSD: M_CLK HSD: V_TXSIN HSD: V_SCLK HSD: V_RXOUT HSD: V_STROBE NC +3.3V GND AGND GND NC NC NC NC
O O
Oa Oa REF REF Ia Ia
I I I O O O O I
I O I
PWR Itpd Itpd Itpd Ot2 Ot2 Ot2 Ot2od PWR Itpu AGND GND Itpu Ot2 Itpu
NOTES: 1. I/O types: Ia It Itpd Itpu It/Ot2 It/Ot12 Oa Ot2
Analog input Digital input, TTL-compatible Digital input, TTL-compatible, internal 75k 25k pull-down Digital input, TTL-compatible, internal 75k 25k pull-up Digital input, TTL-compatible/digital output, TTL-compatible, 2 mA, ZINTERNAL = 120 Digital input, TTL-compatible/digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 Analog output Digital output, TTL-compatible, 2 mA, ZINTERNAL = 120
Ot12 Digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 AGND Analog Ground GND Digital Ground See CX20437 VC Digital Electrical Characteristics (Table 3-9) and CX20437 VC Analog Electrical Characteristics (Table 3-10). 2. Interface Legend: HSD Host Side Device
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SmartHSF Mobile Modem Data Sheet
Table 3-8. CX20437 VC Pin Signal Definitions
Label Pin I/O Type SYSTEM SIGNALS VDD MAVDD VSS MAVSS VSUB POR SET3V_BAR2 SLEEP M_CLKIN M_SCK M_CNTRL_SIN M_STROBE M_TXSIN M_RXOUT M_LINE_OUTP M_LINE_IN M_MIC_IN M_SPKR_OUT 17, 25 5 28 6 27 4 26 1 19 21 18 23 20 22 9 14 13 3 PWR PWR GND AGND GND Itpu Itpu Itpd Itpd Ot2 Itpd Ot2 Itpd Ot2 O(DF) I(DA) I(DA) O(DF) Digital Power Supply. Connect to +3.3V and digital circuits power supply filter. Analog Power Supply. Connect to +3.3V and analog circuits power supply filter. Digital Ground. Connect to GND. Analog Ground. Connect to AGND. Analog Ground. Connect to AGND. Power-On Reset. Active low reset input. Connect to Host RESET#. Set +3.3V Analog Reference. Connect to GND. HSD INTERCONNECT IA Sleep. Active high sleep input. Connect to HSD IASLEEP pin. Master Clock Input. Connect to HSD M_CLK pin. Serial Clock Output. Connect to HSD V_SCLK pin. Control Input. Connect to HSD V_CTRL pin. Serial Frame Sync. Connect to HSD V_STROBE pin. Serial Transmit Data. Connect to HSD V_TXSIN pin. Serial Receive Data. Connect to HSD V_RXOUT pin. Telephone Handset Out (TELOUT). Single-ended analog data output to the telephone handset circuit. The output can drive a 300 load. Telephone Handset Out (TELIN). Single-ended analog data input from the telephone handset circuit. Microphone Input. Single-ended from the microphone circuit. Modem Speaker Analog Output. The M_SPKR_OUT analog output reflects the received analog input signal. The M_SPKR_OUT on/off and three levels of attenuation are controlled by bits in DSP RAM. When the speaker is turned off, the M_SPKR_OUT output is clamped to the voltage at the VC pin. The M_SPKR_OUT output can drive an impedance as low as 300 ohms. In a typical application, the M_SPKR_OUT output is an input to an external LM386 audio power amplifier. High Voltage Reference. Connect to VC through 10 F and 0.1 F (ceramic) in parallel. Ensure a very close proximity between these capacitors and VREF pin. Low Voltage Reference. Connect to analog ground through ferrite bead in series with a parallel combination of 10 F and 0.1 F (ceramic). Ensure a very close proximity between these capacitors and VC pin. Use a short path and a wide trace to AGND pin. Also connect to handset interface circuit (VC_HAND) through a ferrite bead. Signal Name/Description
TELEPHONE LINE (DAA)/AUDIO INTERFACE AND REFERENCE VOLTAGE
VREF VC
11 12
REF REF
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SmartHSF Mobile Modem Data Sheet
Table 3-8. CX20437 VC Pin Signal Definitions (Continued)
Label Pin I/O Type NOT USED M_DIG_SPEAKER M_LINE_OUTM M_RELAYA M_RELAYB M_MIC_BIAS M_ACT90 M_1BIT_OUT D_LPBK_BAR NC NOTES: 1. I/O types: Ia It Itpd Itpu It/Ot2 It/Ot12 Oa Ot2 Ot12 2 10 24 16 15 29 30 31 7, 8, 32 Ot2 Oa Ot Ot Oa Itpu Ot2 It NC Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Not Used. Leave open. Internal No Connect. Signal Name/Description
Analog input Digital input, TTL-compatible Digital input, TTL-compatible, internal 75k 25k pull-down Digital input, TTL-compatible, internal 75k 25k pull-up Digital input, TTL-compatible/digital output, TTL-compatible, 2 mA, ZINTERNAL = 120 Digital input, TTL-compatible/digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 Analog output Digital output, TTL-compatible, 2 mA, ZINTERNAL = 120
Digital output, TTL-compatible, 12 mA, ZINTERNAL = 32 AGND Analog Ground GND Digital Ground See CX20437 VC Digital Electrical Characteristics (Table 3-9) and CX20437 VC Analog Electrical Characteristics (Table 3-10). 2. Interface Legend: HSD Host Side Device
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SmartHSF Mobile Modem Data Sheet
Table 3-9. CX20437 VC Digital Electrical Characteristics
Parameter Input Voltage Low Input Voltage Low Input Voltage High Output Voltage Low Output Voltage High Input Leakage Current Output Leakage Current (High Impedance) Symbol VIN VIL VIH VOL VOH - - Min. -0.30 -0.30 0.4*VDD 0 0.8*VDD -10 -10 Typ. - - - - - - - Max. VDD+0.3 VDD+0.3 - 0.4 VDD 10 10 Units V V V V V A A Test Conditions
Test conditions unless otherwise noted: 1. Test Conditions unless otherwise stated: VDD = +3.3 0.3 VDC; TA = 0C to 70C; external load = 50 pF
Table 3-10. CX20437 VC Analog Electrical Characteristics
Signal Name M_LINE_IN (TELIN), M_MIC_IN M_LINE_OUTP (TELOUT) Type I (DA) Characteristic Input Impedance AC Input Voltage Range Reference Voltage Minimum Load Maximum Capacitive Load Output Impedance AC Output Voltage Range Reference Voltage DC Offset Voltage Minimum Load Maximum Capacitive Load Output Impedance AC Output Voltage Range Reference Voltage DC Offset Voltage > 70K 1.1 VP-P +1.35 VDC 300 0 F 10 1.4 VP-P (with reference to ground and a 600 load) +1.35 VDC 200 mV 300 0.01 F 10 1.4 VP-P +1.35 VDC 20 mV Value
O (DD)
M_SPKR_OUT
O (DF)
Test conditions unless otherwise noted: 1. Test Conditions unless otherwise stated: VDD = +3.3 0.3 VDC; MAVDD = +3.3 0.3 VDC, TA = 0C to 70C
Parameter DAC to Line Driver output (600 load, 3dB in SCF and CTF) SNR/SDR at: 4Vp-p differential 2Vp-p differential -10dBm differential DAC to Speaker Driver output (150 load, 3dB in SCF and CTF, -6dB in speaker driver) SNR/SDR at: 2Vp-p 1Vp-p -10dBm Line Input to ADC (6dB in AAF) SNR/SDR at -10 dBm Input Leakage Current (analog inputs) Output Leakage Current (analog outputs)
Min
Typ 88/85 82/95 72/100
Max
Units dB
dB 88/75 82/80 72/83 80/95 -10 -10 10 10 dB A A
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SmartHSF Mobile Modem Data Sheet 3.4 1.1.1 ELECTRICAL ENVIRONMENTAL, AND TIMING SPECIFICATIONS Operating Conditions, Absolute Maximum Ratings, and Power Requirements
The operating conditions are specified in Table 3-11. The absolute maximum ratings are listed in Table 3-12. The current and power requirements are listed in Table 3-13. Table 3-11. Operating Conditions
Parameter Supply Voltage Operating Temperature Range Symbol VDD TA Limits +3.0 to +3.6 0 to +70 Units VDC C
Table 3-12. Absolute Maximum Ratings
Parameter Supply Voltage Input Voltage Storage Temperature Range Analog Inputs Voltage Applied to Outputs in High Impedance (Off) State DC Input Clamp Current DC Output Clamp Current Static Discharge Voltage (25C) Latch-up Current (25C) * VIO = +3.3V 0.3V or +5V 5%. Symbol VDD VIN TSTG VIN VHZ IIK IOK VESD ITRIG Limits -0.5 to +4.0 -0.5 to (VIO +0.5)* -55 to +125 -0.3 to (MAVDD + 0.5) -0.5 to (VIO +0.5)* 20 20 2500 400 Units VDC VDC C VDC VDC mA mA VDC mA
Caution: Handling CMOS Devices These devices contain circuitry to protect the inputs against damage due to high static voltages. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltage. An unterminated input can acquire unpredictable voltages through coupling with stray capacitance and internal cross talk. Both power dissipation and device noise immunity degrades. Therefore, all inputs should be connected to an appropriate supply voltage. Input signals should never exceed the voltage range from 0.5V or more negative than GND to 0.5V or more positive than VDD. This prevents forward biasing the input protection diodes and possibly entering a latch up mode due to high current transients.
100553B
Conexant
3-27
SmartHSF Mobile Modem Data Sheet
Table 3-13. Current and Power Requirements
Conditions CX11250 HSD + CX20463 LSD Device State (Dx) and Bus State (Bx) D0, B0 D0, B0 D3, B0 D3, B1 D3, B2, B3 (D3hot) D3, B3 (D3cold) PCI Bus Power On On On On On Off PCI Clock (PCICLK) Running Running Running Running Stopped Stopped Line Connection Yes No No No No No Typical Current (mA) 38.4 10.4 8.3 8.3 8.3 2.4 Maximum Current (mA) 42.2 11.4 9.2 9.2 9.2 2.7 Typical Power (mW) 127 34.3 27.4 27.4 27.4 7.9 Maximum Power (mW) 152 41.0 33.1 33.1 33.1 9.7 Current Power
NOTES: Operating voltage: VDD = +3.3V 0.3V. Test conditions: VDD = +3.3 VDC for typical values; VDD = +3.6 VDC for maximum values. Definitions: PCI Bus Power On: PCI Bus +5V and +3.3V on (modem normally powered by +3.3V from PCI Bus +3.3V or regulated down from PCI Bus +5V); PCIRST# not asserted. Off: PCI Bus +5V and +3.3V off (modem normally powered by +3.3V from Vaux or Vpci); PCIRST# asserted. Mini PCI Bus Power On: PCI Bus +3.3V on (modem normally powered by +3.3V from PCI Bus +3.3V; PCIRST# not asserted. Off: PCI Bus +3.3V off (modem normally powered by +3.3V from Vaux or Vpci); PCIRST# asserted. PCI Clock (PCICLK) Running: PCI Bus signal PCICLK running (PCI Bus and Mini PCI Bus only). Stopped: PCI Bus signal PCICLK stopped (off) (PCI Bus and Mini PCI Bus only). Line connection: Yes: Off-hook, IA powered. No: On-hook, IA powered down. Device States: D3: Low power state. Suspend state can change the system power state; the resulting power state depends on the system architecture (OS, BIOS, hardware) and system configuration (i.e., other PCI installed cards). D0: Full power state. Device and Bus States: D0, B0: Any PCI transaction, PCICLK running, VCC present. D3, B1: No PCI Bus transactions, PCICLK running, VCC present. D3, B2, B3: No PCI transactions, PCICLK stopped, VCC may be present. D3, B3: No PCI transactions, PCICLK stopped, no VCC. Refer to the PCI Bus Power Management Interface Specification for additional information.
3-28
Conexant
100553B
SmartHSF Mobile Modem Data Sheet 3.4.2 SERIAL EEPROM INTERFACE TIMING
The serial EEPROM interface timing is listed in Table 3-14 and is shown in Figure 3-7. Table 3-14. Timing - Serial EEPROM Interface
Symbol tCSS tCSH tDIS tDIH tPD0 tPD1 tDF tSV tSKH tSKL - Parameter Chip select setup Chip select hold Data input setup Data input hold Data input delay Data input delay Data input disable time Status valid Clock high Clock low Endurance Min 200 (Note 1) 500 (Note 1) 200 (Note 1) 1600 50 50 - - 900 (Note 1) 900 (Note 1) - Typ. - - - - - - - - - - 106 Max - - - - - - Note 2 Note 3 - - - Units ns ns ns ns ns ns ns ns ns ns Cycles Test Condition
NOTES: 1. Minimum times for HSD outputs when PCI clock = 33 MHz (times increase with decreasing PCI clock frequency). 2. No requirement. 3. Timing controlled by software for programming of EEPROM. No requirement for EEPROM read into HSD.
SROMCS (CS)
tCSS tSKH tSKL tCSH
SROMCLK (SK)
tDIS
tDIH
SROMOUT (DI)
tPD0 tPD1 tDF
SROMIN (DO) (READ)
tDF
tSV
SROMIN (DO) (PROGRAM)
1219F3-7 WF-EEPROM
Figure 3-7. Waveforms - Serial EEPROM Interface
100553B
Conexant
3-29
SmartHSF Mobile Modem Data Sheet
4.
4.1
HOST SOFTWARE INTERFACE
PCI CONFIGURATION REGISTERS
The PCI Configuration registers are located in the HSD. Table 4-1 identifies the configuration register contents that are supported in the HSD: Table 4-1. PCI Configuration Registers
Bit Offset (Hex) 00 04 08 0C 10 14 18 1C 20 24 28 2C 30 34 38 3C 40 44 31:24 23:16 15:8 7:0
Device ID Vendor ID Status (see Table 4-2) Command (see Table 4-3) Class Code Revision ID Not Implemented Header Type Latency Timer Not Implemented Base Address 0 - Memory (HSD) Base Address 1 - I/O (Dummy) Unused Base Address Register Unused Base Address Register Unused Base Address Register Unused Base Address Register CIS Pointer (Not used) Subsystem ID Subsystem Vendor ID Not Implemented Reserved Cap Ptr Reserved Max Latency Min Grant Interrupt Pin Interrupt Line Power Management Capabilities (PMC) Next Item Ptr = 0 Capability ID =01h (see Table 4-4) Data PMCSR_BSE = 0 Power Management Bridge Support Control/Status Register (PMCSR) Extensions (see Table 4-5)
100553B
Conexant
4-1
SmartHSF Mobile Modem Data Sheet 4.1.1 0x00 - Vendor ID Field
This 16-bit read-only field identifying the device manufacturer is loaded from the serial EEPROM after reset events. The value is 14F1 for Conexant.
4.1.2
0x02 - Device ID Field
This 16-bit read-only field identifying the particular device is loaded from the serial EEPROM after reset events. The default Device ID if serial EEPROM is not loaded is 0x1085.
4.1.3
0x04 - Command Register
Command Register 15 - 10 Reserved 9 r/w 8 r/w 7 0 6 r/w 5 0 4 0 3 0 2 r/w 1 R/w 0 r/w
r/w indicates the bit is read or write. The Command Register bits are described in Table 4-2. Table 4-2. Command Register
Bit 0 1 Description Controls a device's response to I/O Space accesses. A value of 0 disables the device response. A value of 1 allows the device to respond to I/O Space accesses. The bit state is 0 after PCIRST# is deasserted. Controls a device's response to Memory Space accesses. A value of 0 disables the device response. A value of 1 allows the device to respond to Memory Space accesses. The bit state is 0 after PCIRST# is deasserted. Controls a device's ability to act as a master on the PCI Bus. A value of 0 disables the device from generating PCI accesses. A value of 1 allows the device to behave as a bus master. The bit state is 0 after PCIRST# is deasserted. Not Implemented. This bit controls the device's response to parity errors. When the bit is set, the device must take its normal action when a parity error is detected. When the bit is 0, the device must ignore any parity errors that it detects and continue normal operation. The bit state is 0 after PCIRST# is deasserted. This bit is used to control whether or not a device does address/data stepping. This bit is read only from the PCI interface. It is loaded from the serial EEROM after PCIRST# is deasserted. This bit is an enable bit for the SERR# driver. A value of 0 disables the SERR# driver. A value of 1 enables the SERR# driver. The bit state is 0 after PCIRST# is deasserted. This bit controls whether or not a master can do fast back-to-back transactions to different devices. A value of 1 means the master is allowed to generate fast back-to-back transactions to different agents as described in Section 3.4.2 of the PCI 2.1 specification. A value of 0 means fast back-to-back transactions are only allowed to the same agent. The bit state is 0 after PCIRST# is deasserted. Reserved
2
5-3 6
7 8 9
15-10
4-2
Conexant
100553B
SmartHSF Mobile Modem Data Sheet 4.1.4 0x06 - Status Register
Status Register Bits 15 r/c 14 r/c 13 r/c 12 r/c 11 r/c 10 - 9 01 8 r/c 7 0 6 0 5 0 4 1 3-0 0000
r/c indicates the bit is readable and clearable (by writing a `1' to corresponding bit position) The Status Register bits are described in Table 4-3. Status register bits may be cleared by writing a `1' in the bit position corresponding to the bit position to be cleared. It is not possible to set a status register bit by writing from the PCI Bus. Writing a `0' has no effect in any bit position. Table 4-3. Status Register
Bit 3-0 4 7-5 8 Description Reserved Extended capabilities = 1. Not Implemented. This bit is only implemented by bus masters. It is set when three conditions are met: 1) the bus agent asserted PERR# itself or observed PERR# asserted; 2) the agent setting the bit acted as the bus master for the operation in which the error occurred; and 3) the Parity Error Response bit (Command Register) is set. These bits encode the timing of DEVSEL#. 01 is supported corresponding to medium speed. Signaled Target Abort. Not implemented. Received Target Abort. This bit must be set by a master device whenever its transaction is terminated with Target-Abort. Received Master Abort. This bit must be set by a master device whenever its transaction (except for Special Cycle) is terminated with Master-Abort. Signaled System Error. This bit must be set whenever the device asserts SERR#. Detected Parity Error. This bit must be set by the device whenever it detects a parity error, even if parity error handling is disabled (as controlled by bit 6 in the Command register).
10-9 11 12 13 14 15
4.1.5 4.1.6
0x08 - Revision ID Field 0x09 - Class Code Field
This 8-bit read-only field identifying the device revision number is hardcoded in the device.
This 24-bit field, contains three 8-bit sub-fields. The upper byte is a base class code: 07 indicates a communications controller. The middle byte is a sub-class code: 80 indicates "other" type of device. The lower byte is 00 which indicates no register level programming defined. The value of the entire Class Code field is 0x078000.
4.1.7
0x0D - Latency Timer Register
The Latency Timer register specifies, in units of PCI Bus clocks, the value of the Latency Timer for this PCI Bus master. This register has 5 read/write bits (MSBs) plus 3 bits of hardwired zero (LSBs). The Latency Timer Register is loaded into the PCI Latency counter each time FRAME# is asserted to determine how long the master is allowed to retain control of the PCI Bus. This register is loaded by system software. The default value for Latency Timer is 00.
4.1.8 4.1.9
0x0E - Header Type Field 0x28 - CIS Pointer Register
Hardwired to 00.
This register points to the CIS memory located in the HSD's memory space.
4.1.10 0x2C - Subsystem Vendor ID Register
Subsystem Vendor ID register is supported. Loaded from the serial EEPROM after PCIRST# is deasserted. 100553B
Conexant
4-3
SmartHSF Mobile Modem Data Sheet 4.1.11 0x2E- Subsystem ID Register
Subsystem ID register is supported. Loaded from the serial EEPROM after PCIRST# is deasserted.
4.1.12 0x34 - Cap Ptr
Capabilities Pointer (CAP_PTR) at offset 0x34 containing hardcoded value 0x40.
4.1.13 0x3C - Interrupt Line Register
The Interrupt Line register is a read/write 8-bit register. POST software will write the value of this register as it initializes and configures the system. The value in this register indicates which of the system interrupt controllers the device's interrupt pin is connected to.
4.1.14 0x3D - Interrupt Pin Register
The Interrupt Pin register tells which interrupt pin the device uses. The value of this register is 0x01, indicating that INTA# will be used.
4.1.15 0x3E - Min Grant Register
The Min Grant register is used to specify the devices desired settings for Latency Timer values. The value specifies a period of time in units of 0.25 microsecond. Min Grant is used for specifying the desired burst period assuming a 33 MHz clock. This register is loaded from the serial EEPROM after PCIRST# is deasserted.
4.1.16 0x3F - Max Latency Register
The Max Latency register is used to specify the devices desired settings for Latency Timer values. The value specifies a period of time in units of 0.25 microsecond. Min Latency specifies how often the device needs to gain access to the PCI Bus. This register is loaded from the serial EEPROM after PCIRST# is deasserted.
4.1.17 0x40 - Capability Identifier
The Capability Identifier is set to 01h to indicate that the data structure currently being pointed to is the PCI Power Management data structure.
4.1.18 0x41 - Next Item Pointer
The Next Item Pointer register describes the location of the next item in the function's capability list. The value given is an offset into the function's PCI Configuration Space. The value of 00h indicates there are no additional items in the capabilities list.
4-4
Conexant
100553B
SmartHSF Mobile Modem Data Sheet 4.1.19 0x42 - PMC - Power Management Capabilities
The HSD contains power management as described in the PCI Power Management Specification, Revision 1.0 Draft, dated Mar 18, 1997. The HSD Configuration registers include the following Power Management features: * Status register bit 4 set to 1 to indicate support for New Capabilities * Capabilities Pointer (CAP_PTR) at offset 0x34 containing hardcoded value 0x40 * Power Management Register block at offset 0x40 and 0x44 (see Table 4-1) The Power Management Capabilities register is a 16-bit read-only register which provides information on the capabilities of the function related to power management (Table 4-4). Table 4-4. Power Management Capabilities (PMC) Register
Bit 2:0 3 4 5 8:6 9 10 15:11 R/W R R R R R R R R Description Version. 010b indicates compliance with Revision 1.0 of the PCI Power Management Interface Specification. PME Clock. Hard coded to 0 to indicate that the PCI clock is not required for PME generation. Reserved (= 0). DSI (Device Specific Initialization). Loaded from serial EEPROM. Aux. Current. Loaded from serial EEPROM. D1_Support. When set to a 1, the HSD device supports D1 power state (loaded from serial EEPROM). D2_ Support. When set to a 1, the HSD device supports D2 power state (loaded from serial EEPROM). These 5 bits indicate which power states allow assertion of PME (loaded from serial EEPROM). A value of 0 for any bit indicates that the function cannot assert the PME# signal while in that power state. Bit 11: 1 = PME# can be asserted from D0 Bit 12: 1 = PME# can be asserted from D1 Bit 13: 1 = PME# can be asserted from D2 Bit 14: 1 = PME# can be asserted from D3hot Bit 15: 1 = PME# can be asserted from D3cold.
4.1.20 0x44 - PMCSR - Power Management Control/Status Register (Offset = 4)
This 16-bit register is used to manage the PCI function's power management state as well as to enable/monitor power management events (Table 4-5). Table 4-5. Power Management Control/Status Register (PMCSR)
Bit 1:0 R/W R/W Power State. 00 = D0 01 = D1 10 = D2 11 = D3. Reserved (= 000000b). PME_En. A 1 enables PME assertion. Data_Select. Selects Data and Data Scale fields. Data Scale. Associated with Data field. Loaded from serial EEPROM. PME_Status. This bit is sticky when PME assertion from D3_cold is supported. PME_Status = 1 indicates PME asserted by the HSD device. Writing 1 clears PME_Status. Writing 0 has no effect. Description
7:2 8 12:9 14:13 15:11
R R/W R/W R R/C
R: Bit(s) is (are) read only. R/W: Bit(s) is (are) readable and writeable. R/C: Bit(s) is (are) readable, and clearable by writing 1 (bit may not be set by writing).
100553B
Conexant
4-5
SmartHSF Mobile Modem Data Sheet 4.1.21 0x46 - PMCSR_BSE - PMCSR PCI to PCI Bridge Support Extensions
PMCSR_BSE is cleared to 0 to indicate that bus power/clock control policies have been disabled.
4.1.22 0x47 - Data
This register is used to report the state dependent data requested by the Data_Select field. The value of this register is scaled by the value reported by the Data_Scale field.
4.2
BASE ADDRESS REGISTER
HSD provides a single Base Address Register. The Base Address Register is a 32-bit register that is used to access the HSD register set. Bits 3:0 are hard-wired to 0 to indicate memory space. Bits 15-4 will be hard-wired to 0. The remaining bits (31 16) will be read/write. This specifies that this device requires a 64k byte address space. After reset, the Base Address Register contains 0x00000000. The 64k byte address space used by the HSD is divided into 4k-byte regions. Each 4k-byte region is used as Table 4-6. Table 4-6. HSD Address Map
Address [15:12] 0x0 0x1 0x2 0x3 0x4 0x5-0xF Address [11:0] 0x0-0xfff 0x0-0xfff 0x0-0xfff 0x0-0xfff 0x0-0xfff 0x0-0xfff Region Name BASIC2 Registers CIS Memory DSP Scratch Pad Reserved Reserved Reserved. Description Buffers, control, and status registers Data loaded from Serial EEPROM for Card Bus applications Access to DSP scratch pad registers
4-6
Conexant
100553B
SmartHSF Mobile Modem Data Sheet 4.3 SERIAL EEPROM INTERFACE
The PCI Configuration Space Header and Power Management registers customizable fields are loaded from EEPROM during Power On Reset and during D3 to D0 power transition soft reset. If the EEPROM is missing, default hard-coded values are used. This section describes how the EEPROM content maps into the registers. The PCI Configuration Space Header and Power Management information is used by the PC BIOS/Windows OS to find the driver for this board and also to find out the extent PCI Power Management is typically supported on the modem board. Obtain the appropriate EEPROM.TXT file (unique to each software configuration) from the local Conexant sales office.
4.3.1
Supported EEPROM Sizes
Two EEPROM sizes are supported: 256 by 16 bit (e.g., 93LC66B) as shown in Table 4-7 and 128 by 16 bit (e.g., 93LC56B) as shown in Table 4-8. The difference is the 256-word version supports modem default country selection from the EEPROM whereas the 128-word version does not. The EEPROM text file used by the DOS4GW B2EPROM program utility lists the EEPROM content 8 bits per line in hexadecimal format. The least significant 8 bits are listed first followed by the most significant 8 bits of the 16-bit word. Table 4-7. EEPROM Content for 256 Words by 16 Bits per Word
Address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F-FE FF 15 14 13 12 11 10 9 8 7 Device ID Vendor ID Subsystem Device ID Subsystem Vendor ID PME DRV 6 5 4 3 2 1 0
Don't Care
Max_Lat PMC bit 8 Sub-Class Code
PMC bit 7
PMC bit 6
Min_Gnt Class Code Prog. I/F
D0C
D3_ Cold
D3_ Hot
CardBus CIS Pointer High (Not used, don't care) CardBus CIS Pointer Low (Not used, don't care) D1C D2C D3C D0D D3 power consumed D1 power consumed D3 power dissipated D1 power dissipated D2 D1 D0 D2_ D1_ DSI State State Don't Care Don't Care
D1D D2D D2 power consumed D0 power consumed D2 power dissipated D0 power dissipated Load CISRAM Count Don't Care Don't Care
D3D
Table 4-8. EEPROM Content for 128 Words by 16 Bits per Word
Address 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F-7F 15 14 13 12 11 10 9 8 7 Device ID Vendor ID Subsystem Device ID Subsystem Vendor ID PME DRV 6 5 4 3 2 1 0
Don't Care
D0C
D3_ Cold
D3_ Hot
Prog. I/F CardBus CIS Pointer High (Not used, don't care) CardBus CIS Pointer Low (Not used, don't care) D1C D2C D3C D0D D1D D2D D3D D3 power consumed D2 power consumed D1 power consumed D0 power consumed D3 power dissipated D2 power dissipated D1 power dissipated D0 power dissipated D2 D1 D0 D2_ D1_ DSI Load CISRAM Count (Not Used, don't care) State State Don't Care Don't Care
Max_Lat PMC bit 8 Sub-Class Code
PMC bit 7
PMC bit 6
Min_Gnt Class Code
100553B
Conexant
4-7
SmartHSF Mobile Modem Data Sheet 4.3.2 Definitions
Device ID Register This mandatory 16-bit register identifies the type of device and is assigned by Conexant. Valid values are:
Modem-Interface SmartHSF/MC-PCI SmartHSF/MC-PCI SmartHSF/MC-PCI SmartHSF/MC-PCI SmartHSF/MS-PCI SmartHSF/MS-PCI SmartHSF/MWC-PCI SmartHSF/MWC-PCI SmartHSF/MWC-PCI SmartHSF/MWC-PCI SmartHSF/MWS-PCI SmartHSF/MWS-PCI Modem Part Number Device ID Comments Data/Fax Data/Fax/Remote TAM Data/Fax/Cellular Data/Fax/Remote TAM/Cellular Data/Fax/Voice/Speakerphone Full-Featured minus Handset
U.S./Japan/Canada Only CX11250-11 + 20463-12 2493 CX11250-11 + 20463-12 2494 CX11250-11 + 20463-12 2193 CX11250-11 + 20463-12 2194 CX11250-11 + 20463-12 + 20437-11 2495 CX11250-11 + 20463-12 + 20437-11 2496
Worldwide including U.S./Japan/Canada CX11250-11 + 20463-11 24A3 Data/Fax CX11250-11 + 20463-11 24A4 Data/Fax/Remote TAM CX11250-11 + 20463-11 21A3 Data/Fax/Cellular CX11250-11 + 20463-11 21A4 Data/Fax/Remote TAM/Cellular CX11250-11 + 20463-11 + 20437-11 24A5 Data/Fax/Voice/Speakerphone CX11250-11 + 20463-11 + 20437-11 24A6 Full-Featured minus Handset
NOTE: The CX prefix may not be included in the part number for some devices. Also, the CX prefix may not appear in the part number as branded on some devices.
Vendor ID Register This mandatory 16-bit register identifies the manufacturer of the device. The value in this read-only register is assigned by a central authority (i.e., the PCI SIG) that controls the issuance of the numbers. The value is 14F1 for Conexant. Subsystem Vendor ID and Subsystem Device Register The subsystem vendor ID is obtained from the SIG, while the vendor supplies its own subsystem device ID. These values are supplied by OEM. Until these values are assigned, Conexant uses default values for Subsystem Vendor ID and Subsystem Device ID which are the same as Vendor ID and Device ID, respectively. A PCI functional device may be contained on a card or be embedded within a subsystem. Two cards or subsystems that use the same PCI functional device core logic would have the same vendor and device IDs. These two optional registers are used to uniquely identify the add-in card or subsystem that the functional device resides within. Software can then distinguish the difference between cards or subsystems manufactured by different vendors but with the same PCI functional device on the card or subsystem. A value of zero in these registers indicates that there isn't a subsystem vendor and subsystem ID associated with the device. Min_Gnt Register This register is assigned by Conexant. The value is 00. This register is optional for a bus master and not applicable to non-master devices. This register indicates how long the master would like to retain PCI Bus ownership whenever it initiates a transaction. The value hardwired into this register indicates how long a burst period the device needs (in increments of 250 ns). A value of zero indicates the device has no stringent requirements in this area. This information is useful in programming the algorithm to be used in the PCI Bus arbiter (if it is programmable). Max_Lat Register This register is assigned by Conexant. The value is 00. This register is optional for a bus master and not applicable to non-master devices. The specification states that this read-only register specifies "how often" the device needs access to the PCI Bus (in increments of 250 ns). A value of zero indicates the device has no stringent requirements for the data. This register could be used to determine the priority-level the bus arbiter assigns to the master.
4-8
Conexant
100553B
SmartHSF Mobile Modem Data Sheet
PMC [8:6] and PME DRV Type These fields are assigned by Conexant. PMC [8:6]: This 3- bit field reports the 3.3Vaux auxiliary current requirements for the PCI function. If the Data Register has been implemented by this function then 1) reads of this field must return a value of "000b" 2) Data Register takes precedence over this field for 3.3Vaux current requirements. If PME# generation from D3cold is not supported by the function (PMC(15)=0), then this field must return a value of "000b" when read. The value is 000b. PME DRV Type: This bit sets the driving capability of the PME pin (0 = active high TTL, 1 = active low Open Drain). The value is 1. Class Code Register (Class Code, Sub-class Code, Prog. I/F) This register is always mandatory and is assigned by Conexant. The value is 07 for Class Code, 80 for Sub-class code, and 00 for Prog. I/F. This register is a 24-bit read-only register divided into three sub-registers: base class, sub-class, and Prog. I/F (programming interface). The register identifies the basic function of the device via the base class (i.e. for modems: Simple Communications Controller), a more specific device sub-class (i.e. for modems: Other Communications Device), and in some cases a registerspecific programming interface (not used for modems). CardBus CIS Pointer (CardBus CIS pointer High, CardBus CIS pointer Low) (Not Used) This read-only register is not used. Data Scale PMCSR[14:13] (D0C, D1C, D2C, D3C, D0D, D1D, D2D, D3D) This value is supplied by the OEM since Conexant implements the Data Register. Until these values are assigned, Conexant uses a default value 0000. This field is required for any function that implements the Data Register. The data scale is a 2- bit read-only field which indicates the scaling factor to be used when interpreting the value of the Data Register. The value and meaning of this field will vary depending on which data value has been selected by the Data_Select field (PMCSR[12:09]). There are 4 data scales to select 1) 0 = unknown 2) 1 = 0.1x, 3) 2 = 0.01x, 4) 3 = 0.001x where x is defined by the Data Select Field. Data Register (D3, D2, D1, D0 power consumed and D3, D2, D1, D0 power dissipated) This value is supplied by the OEM since Conexant implements the Data Register. Until these values are assigned, Conexant uses a default value of 0000000000000000. The Data Register is an optional, 8-bit read-only register that provides a mechanism for the function to report state dependent operating data such as power consumed or heat dissipation. Typically the data returned through the Data register is a static copy (look up table, for example) of the function's worst case "DC characteristics" data sheet. This data, when made available to system software could then be used to intelligently make decisions about power budgeting, cooling requirements, etc. The data returned by the data register is selected by the Data Select field (PMCSR[12:09]). Load CISRAM Count (CIS _SIZE) (Not Used) This register is not used. PMC[15:9, 5] (D3_Cold, D3_Hot, D2, D1, D0, D2_Support, D1_Support, DSI) PMC[15:11]: PME_Support (D3_Cold, D3_Hot, D2, D1, D0)- This 5-bit field indicates the power states in which the function may assert PME#. A value of 0b for any bit indicates that the function is not capable of asserting the PME# signal while in that power state. D2 and D1 must be 0 since the modem does not support these states. The rest of the values are supplied by the OEM and the values depend upon the systems in which the modem will be installed. Conexant uses a default value of 49. This is for a system which does not support D3cold but supports D3hot. When D3_Cold is a 1, PMC[15] is set to a 1 if VauxDET is high at device power on reset (POR) or is reset to a 0 if VauxDET is low at POR. When D3_Cold is a 0, PMC[15] is always 0, regardless of the VauxDET level. PMC[10] (D2_Support): If this bit is a 1 then function supports the D2 Power Management State. Currently the modems do not support this state and therefore this field must be 0. PMC[9] (D1_Support): If this bit is a 1 then function supports the D1 Power Management State. Currently the modems do not support this state and therefore this field must be 0.
100553B
Conexant
4-9
SmartHSF Mobile Modem Data Sheet
DSI: The Device Specific Initialization bit indicates whether special initialization of this function is required (beyond the standard PCI configuration header) before the generic class device driver is able to use it. This bit should always be set to "1". NOTE: For more information, refer to PCI Bus Power Management Interface Specification.
4-10
Conexant
100553B
SmartHSF Mobile Modem Data Sheet
5.
PACKAGE DIMENSIONS
The 100-pin TQFP package dimensions are shown in Figure 5-1. The 32-pin TQFP package dimensions are shown in Figure 5-2.
16.00 0.15 14.00 0.05 12.00 REF
PIN 1 REF
16.00 0.15
13.87 0.05
0.500 BSC
0.22 0.05
13.87 0.05
14.00 0.05
14.00 0.05
DETAIL A
0.50 REF 1.00 .05
0.14 .03 0.10 .05 COPLANARITY = 0.08 MAX. 0.60 +0.15, -0.10 Ref. 100-PIN TQFP (GP00-D530) 1.00 REF
DETAIL A
PD-TQFP-100-D530 (032699)
Figure 5-1. Package Dimensions - 100-Pin TQFP
100553B
Conexant
14.00 0.05
12.00 REF
5-1
SmartHSF Mobile Modem Data Sheet
D D1 D2
PIN 1 REF
D
D1 D2
D1
e
b
DETAIL A
Dim. A
Millimeters Max. Min. 1.6 MAX 0.15 0.05 1.4 REF 9.25 8.75 7.0 REF 5.6 REF 0.75 0.5 1.0 REF 0.80 BSC 0.30 0.40 0.19 0.13 0.10 MAX
Inches* Max. Min. 0.0630 MAX 0.0020 0.3445 0.0059 0.3642 0.0551 REF 0.2756 REF 0.2205 REF 0.0197 0.0295 0.0394 REF 0.0315 BSC 0.0118 0.0051 0.0157 0.0075
D1
A1 A2 D D1 D2 L L1 e b c Coplanarity
A
A2
0.004 MAX
Ref: 32-PIN TQFP (GP00-D262)
c A1 L1 DETAIL A
PD-TQFP-32 (040395)
L
* Metric values (millimeters) should be used for PCB layout. English values (inches) are converted from metric values and may include round-off errors.
Figure 5-2. Package Dimensions - 32-pin TQFP
5-2
Conexant
100553B
NOTES
0.0 Sales Offices
Further Information literature@conexant.com (800) 854-8099 (North America) (949) 483-6996 (International) Printed in USA World Headquarters Conexant Systems, Inc. 4311 Jamboree Road Newport Beach, CA 92660-3007 Phone: (949) 483-4600 Fax 1: (949) 483-4078 Fax 2: (949) 483-4391 Americas U.S. Northwest/ Pacific Northwest - Santa Clara Phone: (408) 249-9696 Fax: (408) 249-7113 U.S. Southwest - Los Angeles Phone: (805) 376-0559 Fax: (805) 376-8180 U.S. Southwest - Orange County Phone: (949) 483-9119 Fax: (949) 483-9090 U.S. Southwest - San Diego Phone: (858) 713-3374 Fax: (858) 713-4001 U.S. North Central - Illinois Phone: (630) 773-3454 Fax: (630) 773-3907 U.S. South Central - Texas Phone: (972) 733-0723 Fax: (972) 407-0639 U.S. Northeast - Massachusetts Phone: (978) 367-3200 Fax: (978) 256-6868 U.S. Southeast - North Carolina Phone: (919) 858-9110 Fax: (919) 858-8669 U.S. Southeast - Florida/ South America Phone: (727) 799-8406 Fax: (727) 799-8306 U.S. Mid-Atlantic - Pennsylvania Phone: (215) 244-6784 Fax: (215) 244-9292 Canada - Ontario Phone: (613) 271-2358 Fax: (613) 271-2359 Europe Europe Central - Germany Phone: +49 89 829-1320 Fax: +49 89 834-2734
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